Lines Matching refs:port
83 static void meson_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
87 static unsigned int meson_uart_get_mctrl(struct uart_port *port)
92 static unsigned int meson_uart_tx_empty(struct uart_port *port)
96 val = readl(port->membase + AML_UART_STATUS);
101 static void meson_uart_stop_tx(struct uart_port *port)
105 val = readl(port->membase + AML_UART_CONTROL);
107 writel(val, port->membase + AML_UART_CONTROL);
110 static void meson_uart_stop_rx(struct uart_port *port)
114 val = readl(port->membase + AML_UART_CONTROL);
116 writel(val, port->membase + AML_UART_CONTROL);
119 static void meson_uart_shutdown(struct uart_port *port)
124 free_irq(port->irq, port);
126 spin_lock_irqsave(&port->lock, flags);
128 val = readl(port->membase + AML_UART_CONTROL);
131 writel(val, port->membase + AML_UART_CONTROL);
133 spin_unlock_irqrestore(&port->lock, flags);
136 static void meson_uart_start_tx(struct uart_port *port)
138 struct circ_buf *xmit = &port->state->xmit;
142 if (uart_tx_stopped(port)) {
143 meson_uart_stop_tx(port);
147 while (!(readl(port->membase + AML_UART_STATUS) & AML_UART_TX_FULL)) {
148 if (port->x_char) {
149 writel(port->x_char, port->membase + AML_UART_WFIFO);
150 port->icount.tx++;
151 port->x_char = 0;
159 writel(ch, port->membase + AML_UART_WFIFO);
161 port->icount.tx++;
165 val = readl(port->membase + AML_UART_CONTROL);
167 writel(val, port->membase + AML_UART_CONTROL);
171 uart_write_wakeup(port);
174 static void meson_receive_chars(struct uart_port *port)
176 struct tty_port *tport = &port->state->port;
182 port->icount.rx++;
183 ostatus = status = readl(port->membase + AML_UART_STATUS);
187 port->icount.overrun++;
189 port->icount.frame++;
191 port->icount.frame++;
193 mode = readl(port->membase + AML_UART_CONTROL);
195 writel(mode, port->membase + AML_UART_CONTROL);
199 writel(mode, port->membase + AML_UART_CONTROL);
201 status &= port->read_status_mask;
208 ch = readl(port->membase + AML_UART_RFIFO);
212 port->icount.brk++;
214 if (uart_handle_break(port))
218 if (uart_handle_sysrq_char(port, ch))
221 if ((status & port->ignore_status_mask) == 0)
227 } while (!(readl(port->membase + AML_UART_STATUS) & AML_UART_RX_EMPTY));
229 spin_unlock(&port->lock);
231 spin_lock(&port->lock);
236 struct uart_port *port = (struct uart_port *)dev_id;
238 spin_lock(&port->lock);
240 if (!(readl(port->membase + AML_UART_STATUS) & AML_UART_RX_EMPTY))
241 meson_receive_chars(port);
243 if (!(readl(port->membase + AML_UART_STATUS) & AML_UART_TX_FULL)) {
244 if (readl(port->membase + AML_UART_CONTROL) & AML_UART_TX_INT_EN)
245 meson_uart_start_tx(port);
248 spin_unlock(&port->lock);
253 static const char *meson_uart_type(struct uart_port *port)
255 return (port->type == PORT_MESON) ? "meson_uart" : NULL;
262 * console on this port at this time. Hence it is not necessary for this
263 * function to acquire the port->lock. (Since there is no console on this
264 * port at this time, the port->lock is not initialized yet.)
266 static void meson_uart_reset(struct uart_port *port)
270 val = readl(port->membase + AML_UART_CONTROL);
272 writel(val, port->membase + AML_UART_CONTROL);
275 writel(val, port->membase + AML_UART_CONTROL);
278 static int meson_uart_startup(struct uart_port *port)
284 spin_lock_irqsave(&port->lock, flags);
286 val = readl(port->membase + AML_UART_CONTROL);
288 writel(val, port->membase + AML_UART_CONTROL);
290 writel(val, port->membase + AML_UART_CONTROL);
293 writel(val, port->membase + AML_UART_CONTROL);
296 writel(val, port->membase + AML_UART_CONTROL);
298 val = (AML_UART_RECV_IRQ(1) | AML_UART_XMIT_IRQ(port->fifosize / 2));
299 writel(val, port->membase + AML_UART_MISC);
301 spin_unlock_irqrestore(&port->lock, flags);
303 ret = request_irq(port->irq, meson_uart_interrupt, 0,
304 port->name, port);
309 static void meson_uart_change_speed(struct uart_port *port, unsigned long baud)
313 while (!meson_uart_tx_empty(port))
316 if (port->uartclk == 24000000) {
317 val = ((port->uartclk / 3) / baud) - 1;
320 val = ((port->uartclk * 10 / (baud * 4) + 5) / 10) - 1;
323 writel(val, port->membase + AML_UART_REG5);
326 static void meson_uart_set_termios(struct uart_port *port,
334 spin_lock_irqsave(&port->lock, flags);
339 val = readl(port->membase + AML_UART_CONTROL);
374 if (port->flags & UPF_HARD_FLOW)
382 writel(val, port->membase + AML_UART_CONTROL);
384 baud = uart_get_baud_rate(port, termios, old, 50, 4000000);
385 meson_uart_change_speed(port, baud);
387 port->read_status_mask = AML_UART_TX_FIFO_WERR;
389 port->read_status_mask |= AML_UART_PARITY_ERR |
392 port->ignore_status_mask = 0;
394 port->ignore_status_mask |= AML_UART_PARITY_ERR |
397 uart_update_timeout(port, termios->c_cflag, baud);
398 spin_unlock_irqrestore(&port->lock, flags);
401 static int meson_uart_verify_port(struct uart_port *port,
406 if (port->type != PORT_MESON)
408 if (port->irq != ser->irq)
415 static void meson_uart_release_port(struct uart_port *port)
417 devm_iounmap(port->dev, port->membase);
418 port->membase = NULL;
419 devm_release_mem_region(port->dev, port->mapbase, port->mapsize);
422 static int meson_uart_request_port(struct uart_port *port)
424 if (!devm_request_mem_region(port->dev, port->mapbase, port->mapsize,
425 dev_name(port->dev))) {
426 dev_err(port->dev, "Memory region busy\n");
430 port->membase = devm_ioremap(port->dev, port->mapbase,
431 port->mapsize);
432 if (!port->membase)
438 static void meson_uart_config_port(struct uart_port *port, int flags)
441 port->type = PORT_MESON;
442 meson_uart_request_port(port);
452 static int meson_uart_poll_get_char(struct uart_port *port)
457 spin_lock_irqsave(&port->lock, flags);
459 if (readl(port->membase + AML_UART_STATUS) & AML_UART_RX_EMPTY)
462 c = readl(port->membase + AML_UART_RFIFO);
464 spin_unlock_irqrestore(&port->lock, flags);
469 static void meson_uart_poll_put_char(struct uart_port *port, unsigned char c)
475 spin_lock_irqsave(&port->lock, flags);
478 ret = readl_poll_timeout_atomic(port->membase + AML_UART_STATUS, reg,
483 dev_err(port->dev, "Timeout waiting for UART TX EMPTY\n");
488 writel(c, port->membase + AML_UART_WFIFO);
491 ret = readl_poll_timeout_atomic(port->membase + AML_UART_STATUS, reg,
496 dev_err(port->dev, "Timeout waiting for UART TX EMPTY\n");
499 spin_unlock_irqrestore(&port->lock, flags);
526 static void meson_uart_enable_tx_engine(struct uart_port *port)
530 val = readl(port->membase + AML_UART_CONTROL);
532 writel(val, port->membase + AML_UART_CONTROL);
535 static void meson_console_putchar(struct uart_port *port, int ch)
537 if (!port->membase)
540 while (readl(port->membase + AML_UART_STATUS) & AML_UART_TX_FULL)
542 writel(ch, port->membase + AML_UART_WFIFO);
545 static void meson_serial_port_write(struct uart_port *port, const char *s,
553 if (port->sysrq) {
556 locked = spin_trylock(&port->lock);
558 spin_lock(&port->lock);
562 val = readl(port->membase + AML_UART_CONTROL);
564 writel(tmp, port->membase + AML_UART_CONTROL);
566 uart_console_write(port, s, count, meson_console_putchar);
567 writel(val, port->membase + AML_UART_CONTROL);
570 spin_unlock(&port->lock);
577 struct uart_port *port;
579 port = meson_ports[co->index];
580 if (!port)
583 meson_serial_port_write(port, s, count);
588 struct uart_port *port;
597 port = meson_ports[co->index];
598 if (!port || !port->membase)
601 meson_uart_enable_tx_engine(port);
606 return uart_set_options(port, co, baud, parity, bits, flow);
632 meson_serial_port_write(&dev->port, s, count);
638 if (!device->port.membase)
641 meson_uart_enable_tx_engine(&device->port);
694 struct uart_port *port)
702 port->uartclk = clk_get_rate(clk);
708 struct uart_port *port)
726 port->uartclk = clk_get_rate(clk_baud);
734 struct uart_port *port;
769 dev_err(&pdev->dev, "port %d already allocated\n", pdev->id);
773 port = devm_kzalloc(&pdev->dev, sizeof(struct uart_port), GFP_KERNEL);
774 if (!port)
779 ret = meson_uart_probe_clocks_legacy(pdev, port);
781 ret = meson_uart_probe_clocks(pdev, port);
786 port->iotype = UPIO_MEM;
787 port->mapbase = res_mem->start;
788 port->mapsize = resource_size(res_mem);
789 port->irq = irq;
790 port->flags = UPF_BOOT_AUTOCONF | UPF_LOW_LATENCY;
792 port->flags |= UPF_HARD_FLOW;
793 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_MESON_CONSOLE);
794 port->dev = &pdev->dev;
795 port->line = pdev->id;
796 port->type = PORT_MESON;
797 port->x_char = 0;
798 port->ops = &meson_uart_ops;
799 port->fifosize = fifosize;
801 meson_ports[pdev->id] = port;
802 platform_set_drvdata(pdev, port);
804 /* reset port before registering (and possibly registering console) */
805 if (meson_uart_request_port(port) >= 0) {
806 meson_uart_reset(port);
807 meson_uart_release_port(port);
810 ret = uart_add_one_port(&meson_uart_driver, port);
819 struct uart_port *port;
821 port = platform_get_drvdata(pdev);
822 uart_remove_one_port(&meson_uart_driver, port);
874 MODULE_DESCRIPTION("Amlogic Meson serial port driver");