Lines Matching refs:val
297 unsigned int val = 0;
299 regmap_read(s->regmap, port->iobase + reg, &val);
301 return val;
304 static void max310x_port_write(struct uart_port *port, u8 reg, u8 val)
308 regmap_write(s->regmap, port->iobase + reg, val);
311 static void max310x_port_update(struct uart_port *port, u8 reg, u8 mask, u8 val)
315 regmap_update_bits(s->regmap, port->iobase + reg, mask, val);
321 unsigned int val = 0;
324 ret = regmap_read(s->regmap, MAX310X_REVID_REG, &val);
328 if (((val & MAX310x_REV_MASK) != MAX3107_REV_ID)) {
330 "%s ID 0x%02x does not match\n", s->devtype->name, val);
340 unsigned int val = 0;
346 ret = regmap_read(s->regmap, MAX310X_CLKSRC_REG, &val);
350 if (val != (MAX310X_CLKSRC_EXTCLK_BIT | MAX310X_CLKSRC_PLLBYP_BIT)) {
361 unsigned int val = 0;
369 regmap_read(s->regmap, MAX310X_REVID_EXTREG, &val);
371 if (((val & MAX310x_REV_MASK) != MAX3109_REV_ID)) {
373 "%s ID 0x%02x does not match\n", s->devtype->name, val);
392 unsigned int val = 0;
400 regmap_read(s->regmap, MAX310X_REVID_EXTREG, &val);
402 if (((val & MAX310x_REV_MASK) != MAX14830_REV_ID)) {
404 "%s ID 0x%02x does not match\n", s->devtype->name, val);
618 unsigned int try = 0, val = 0;
622 regmap_read(s->regmap, MAX310X_STS_IRQSTS_REG, &val);
624 if (val & MAX310X_STS_CLKREADY_BIT)
844 unsigned int val = ~0;
847 MAX310X_GLOBALIRQ_REG, &val));
848 val = ((1 << s->devtype->nr) - 1) & ~val;
849 if (!val)
851 if (max310x_port_irq(s, fls(val) - 1) == IRQ_HANDLED)
1062 unsigned int val;
1071 val = MAX310X_MODE2_RXEMPTINV_BIT | MAX310X_MODE2_FIFORST_BIT;
1072 max310x_port_write(port, MAX310X_MODE2_REG, val);
1077 val = (clamp(port->rs485.delay_rts_before_send, 0U, 15U) << 4) |
1079 max310x_port_write(port, MAX310X_HDPIXDELAY_REG, val);
1101 val = MAX310X_IRQ_RXEMPTY_BIT | MAX310X_IRQ_TXEMPTY_BIT;
1102 max310x_port_write(port, MAX310X_IRQEN_REG, val | MAX310X_IRQ_CTS_BIT);
1200 unsigned int val;
1204 val = max310x_port_read(port, MAX310X_GPIODATA_REG);
1206 return !!((val >> 4) & (1 << (offset % 4)));