Lines Matching refs:brd
191 struct jsm_board *brd;
197 brd = channel->ch_bd;
237 brd->bd_ops->flush_uart_write(channel);
238 brd->bd_ops->flush_uart_read(channel);
254 brd->bd_ops->uart_init(channel);
259 brd->bd_ops->param(channel);
366 int jsm_tty_init(struct jsm_board *brd)
372 if (!brd)
375 jsm_dbg(INIT, &brd->pci_dev, "start\n");
381 brd->nasync = brd->maxports;
387 for (i = 0; i < brd->nasync; i++) {
388 if (!brd->channels[i]) {
394 brd->channels[i] = kzalloc(sizeof(struct jsm_channel), GFP_KERNEL);
395 if (!brd->channels[i]) {
396 jsm_dbg(CORE, &brd->pci_dev,
403 ch = brd->channels[0];
404 vaddr = brd->re_map_membase;
407 for (i = 0; i < brd->nasync; i++, ch = brd->channels[i]) {
409 if (!brd->channels[i])
414 if (brd->bd_uart_offset == 0x200)
415 ch->ch_neo_uart = vaddr + (brd->bd_uart_offset * i);
417 ch->ch_cls_uart = vaddr + (brd->bd_uart_offset * i);
419 ch->ch_bd = brd;
428 jsm_dbg(INIT, &brd->pci_dev, "finish\n");
432 int jsm_uart_port_init(struct jsm_board *brd)
437 if (!brd)
440 jsm_dbg(INIT, &brd->pci_dev, "start\n");
446 brd->nasync = brd->maxports;
449 for (i = 0; i < brd->nasync; i++) {
451 if (!brd->channels[i])
454 brd->channels[i]->uart_port.irq = brd->irq;
455 brd->channels[i]->uart_port.uartclk = 14745600;
456 brd->channels[i]->uart_port.type = PORT_JSM;
457 brd->channels[i]->uart_port.iotype = UPIO_MEM;
458 brd->channels[i]->uart_port.membase = brd->re_map_membase;
459 brd->channels[i]->uart_port.fifosize = 16;
460 brd->channels[i]->uart_port.ops = &jsm_ops;
467 brd->channels[i]->uart_port.line = line;
468 rc = uart_add_one_port(&jsm_uart_driver, &brd->channels[i]->uart_port);
476 jsm_dbg(INIT, &brd->pci_dev, "finish\n");
480 int jsm_remove_uart_port(struct jsm_board *brd)
485 if (!brd)
488 jsm_dbg(INIT, &brd->pci_dev, "start\n");
494 brd->nasync = brd->maxports;
497 for (i = 0; i < brd->nasync; i++) {
499 if (!brd->channels[i])
502 ch = brd->channels[i];
505 uart_remove_one_port(&jsm_uart_driver, &brd->channels[i]->uart_port);
508 jsm_dbg(INIT, &brd->pci_dev, "finish\n");