Lines Matching defs:linestatus
278 u8 linestatus = 0;
290 linestatus = ch->ch_cached_lsr;
330 * Grab the linestatus register, we need to check
333 linestatus = readb(&ch->ch_neo_uart->lsr);
340 if (linestatus & UART_17158_RX_FIFO_DATA_ERROR)
355 * Since we are grabbing the linestatus register, which
359 if (linestatus & (UART_LSR_THRE | UART_17158_TX_AND_FIFO_CLR))
362 linestatus = 0;
394 * Its possible we have a linestatus from the loop above
397 linestatus |= readb(&ch->ch_neo_uart->lsr);
402 * But before we do, cache the linestatus, just in case.
404 if (!(linestatus & UART_LSR_DR)) {
405 ch->ch_cached_lsr = linestatus;
410 linestatus &= ~UART_LSR_DR;
413 * Since we are grabbing the linestatus register, which
417 if (linestatus & (UART_LSR_THRE | UART_17158_TX_AND_FIFO_CLR)) {
418 linestatus &= ~(UART_LSR_THRE | UART_17158_TX_AND_FIFO_CLR);
425 if (linestatus & error_mask) {
427 linestatus = 0;
451 ch->ch_equeue[head] = (u8) linestatus;
456 /* Ditch any remaining linestatus value. */
457 linestatus = 0;
827 int linestatus;
840 linestatus = readb(&ch->ch_neo_uart->lsr);
842 jsm_dbg(INTR, &ch->ch_bd->pci_dev, "%s:%d port: %d linestatus: %x\n",
843 __FILE__, __LINE__, port, linestatus);
845 ch->ch_cached_lsr |= linestatus;
861 if (linestatus & UART_17158_RX_FIFO_DATA_ERROR)
871 if (linestatus & UART_LSR_PE) {
877 if (linestatus & UART_LSR_FE) {
883 if (linestatus & UART_LSR_BI) {
890 if (linestatus & UART_LSR_OE) {
903 if (linestatus & UART_LSR_THRE) {
911 else if (linestatus & UART_17158_TX_AND_FIFO_CLR) {