Lines Matching defs:UARTSR
27 #define UARTSR 0x0014 /* UART mode status register */
171 while (((status = readl(sport->membase + UARTSR)) &
180 sport->membase + UARTSR);
212 while (((status = readl(sport->membase + UARTSR)) &
217 sport->membase + UARTSR);
248 status = readl(sport->membase + UARTSR);
271 sport->membase + UARTSR);
272 status = readl(sport->membase + UARTSR);
295 status = readl(sport->membase + UARTSR);
310 status = readl(port->membase + UARTSR) & LINFLEXD_UARTSR_DTFTFF;
578 while ((readl(port->membase + UARTSR) &
583 while (readl(port->membase + UARTSR) &
588 writel((readl(port->membase + UARTSR) |
590 port->membase + UARTSR);