Lines Matching defs:pl011_read
286 static unsigned int pl011_read(const struct uart_amba_port *uap,
318 status = pl011_read(uap, REG_FR);
323 ch = pl011_read(uap, REG_DR) | UART_DUMMY_DR_RX;
775 if (pl011_read(uap, REG_FR) & UART01x_FR_TXFF) {
1189 while (pl011_read(uap, REG_FR) & uap->vendor->fr_busy)
1384 pl011_read(uap, REG_FR) & UART01x_FR_TXFF)
1438 status = pl011_read(uap, REG_FR) & UART01x_FR_MODEM_ANY;
1472 pl011_read(uap, REG_ICR);
1473 pl011_read(uap, REG_ICR);
1484 status = pl011_read(uap, REG_RIS) & uap->im;
1508 status = pl011_read(uap, REG_RIS) & uap->im;
1524 unsigned int status = pl011_read(uap, REG_FR) ^ uap->vendor->inv_fr;
1535 unsigned int status = pl011_read(uap, REG_FR);
1555 cr = pl011_read(uap, REG_CR);
1586 lcr_h = pl011_read(uap, REG_LCRH_TX);
1602 pl011_write(pl011_read(uap, REG_MIS), uap, REG_ICR);
1616 pl011_write(pl011_read(uap, REG_IMSC) & ~UART011_TXIM, uap,
1632 status = pl011_read(uap, REG_FR);
1636 return pl011_read(uap, REG_DR);
1645 while (pl011_read(uap, REG_FR) & UART01x_FR_TXFF)
1680 uap->im = pl011_read(uap, REG_IMSC);
1743 if (pl011_read(uap, REG_FR) & UART01x_FR_RXFE)
1746 pl011_read(uap, REG_DR);
1801 uap->old_status = pl011_read(uap, REG_FR) & UART01x_FR_MODEM_ANY;
1842 val = pl011_read(uap, lcrh);
1858 cr = pl011_read(uap, REG_CR);
2034 old_cr = pl011_read(uap, REG_CR);
2200 while (pl011_read(uap, REG_FR) & UART01x_FR_TXFF)
2227 old_cr = pl011_read(uap, REG_CR);
2240 while ((pl011_read(uap, REG_FR) ^ uap->vendor->inv_fr)
2256 if (pl011_read(uap, REG_CR) & UART01x_CR_UARTEN) {
2259 lcr_h = pl011_read(uap, REG_LCRH_TX);
2274 ibrd = pl011_read(uap, REG_IBRD);
2275 fbrd = pl011_read(uap, REG_FBRD);
2280 if (pl011_read(uap, REG_CR)