Lines Matching refs:port
49 * We wrap our port structure around the generic uart_port.
52 struct uart_port port;
59 static void pl010_stop_tx(struct uart_port *port)
62 container_of(port, struct uart_amba_port, port);
65 cr = readb(uap->port.membase + UART010_CR);
67 writel(cr, uap->port.membase + UART010_CR);
70 static void pl010_start_tx(struct uart_port *port)
73 container_of(port, struct uart_amba_port, port);
76 cr = readb(uap->port.membase + UART010_CR);
78 writel(cr, uap->port.membase + UART010_CR);
81 static void pl010_stop_rx(struct uart_port *port)
84 container_of(port, struct uart_amba_port, port);
87 cr = readb(uap->port.membase + UART010_CR);
89 writel(cr, uap->port.membase + UART010_CR);
92 static void pl010_disable_ms(struct uart_port *port)
94 struct uart_amba_port *uap = (struct uart_amba_port *)port;
97 cr = readb(uap->port.membase + UART010_CR);
99 writel(cr, uap->port.membase + UART010_CR);
102 static void pl010_enable_ms(struct uart_port *port)
105 container_of(port, struct uart_amba_port, port);
108 cr = readb(uap->port.membase + UART010_CR);
110 writel(cr, uap->port.membase + UART010_CR);
117 status = readb(uap->port.membase + UART01x_FR);
119 ch = readb(uap->port.membase + UART01x_DR);
122 uap->port.icount.rx++;
128 rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
130 writel(0, uap->port.membase + UART01x_ECR);
134 uap->port.icount.brk++;
135 if (uart_handle_break(&uap->port))
138 uap->port.icount.parity++;
140 uap->port.icount.frame++;
142 uap->port.icount.overrun++;
144 rsr &= uap->port.read_status_mask;
154 if (uart_handle_sysrq_char(&uap->port, ch))
157 uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag);
160 status = readb(uap->port.membase + UART01x_FR);
162 spin_unlock(&uap->port.lock);
163 tty_flip_buffer_push(&uap->port.state->port);
164 spin_lock(&uap->port.lock);
169 struct circ_buf *xmit = &uap->port.state->xmit;
172 if (uap->port.x_char) {
173 writel(uap->port.x_char, uap->port.membase + UART01x_DR);
174 uap->port.icount.tx++;
175 uap->port.x_char = 0;
178 if (uart_circ_empty(xmit) || uart_tx_stopped(&uap->port)) {
179 pl010_stop_tx(&uap->port);
183 count = uap->port.fifosize >> 1;
185 writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
187 uap->port.icount.tx++;
193 uart_write_wakeup(&uap->port);
196 pl010_stop_tx(&uap->port);
203 writel(0, uap->port.membase + UART010_ICR);
205 status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
214 uart_handle_dcd_change(&uap->port, status & UART01x_FR_DCD);
217 uap->port.icount.dsr++;
220 uart_handle_cts_change(&uap->port, status & UART01x_FR_CTS);
222 wake_up_interruptible(&uap->port.state->port.delta_msr_wait);
231 spin_lock(&uap->port.lock);
233 status = readb(uap->port.membase + UART010_IIR);
246 status = readb(uap->port.membase + UART010_IIR);
252 spin_unlock(&uap->port.lock);
257 static unsigned int pl010_tx_empty(struct uart_port *port)
260 container_of(port, struct uart_amba_port, port);
261 unsigned int status = readb(uap->port.membase + UART01x_FR);
265 static unsigned int pl010_get_mctrl(struct uart_port *port)
268 container_of(port, struct uart_amba_port, port);
272 status = readb(uap->port.membase + UART01x_FR);
283 static void pl010_set_mctrl(struct uart_port *port, unsigned int mctrl)
286 container_of(port, struct uart_amba_port, port);
289 uap->data->set_mctrl(uap->dev, uap->port.membase, mctrl);
292 static void pl010_break_ctl(struct uart_port *port, int break_state)
295 container_of(port, struct uart_amba_port, port);
299 spin_lock_irqsave(&uap->port.lock, flags);
300 lcr_h = readb(uap->port.membase + UART010_LCRH);
305 writel(lcr_h, uap->port.membase + UART010_LCRH);
306 spin_unlock_irqrestore(&uap->port.lock, flags);
309 static int pl010_startup(struct uart_port *port)
312 container_of(port, struct uart_amba_port, port);
322 uap->port.uartclk = clk_get_rate(uap->clk);
327 retval = request_irq(uap->port.irq, pl010_int, 0, "uart-pl010", uap);
334 uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
340 uap->port.membase + UART010_CR);
350 static void pl010_shutdown(struct uart_port *port)
353 container_of(port, struct uart_amba_port, port);
358 free_irq(uap->port.irq, uap);
361 * disable all interrupts, disable the port
363 writel(0, uap->port.membase + UART010_CR);
366 writel(readb(uap->port.membase + UART010_LCRH) &
368 uap->port.membase + UART010_LCRH);
377 pl010_set_termios(struct uart_port *port, struct ktermios *termios,
381 container_of(port, struct uart_amba_port, port);
389 baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
390 quot = uart_get_divisor(port, baud);
413 if (uap->port.fifosize > 1)
416 spin_lock_irqsave(&uap->port.lock, flags);
419 * Update the per-port timeout.
421 uart_update_timeout(port, termios->c_cflag, baud);
423 uap->port.read_status_mask = UART01x_RSR_OE;
425 uap->port.read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
427 uap->port.read_status_mask |= UART01x_RSR_BE;
432 uap->port.ignore_status_mask = 0;
434 uap->port.ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
436 uap->port.ignore_status_mask |= UART01x_RSR_BE;
442 uap->port.ignore_status_mask |= UART01x_RSR_OE;
449 uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX;
451 old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
453 if (UART_ENABLE_MS(port, termios->c_cflag))
458 writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
459 writel(quot & 0xff, uap->port.membase + UART010_LCRL);
466 writel(lcr_h, uap->port.membase + UART010_LCRH);
467 writel(old_cr, uap->port.membase + UART010_CR);
469 spin_unlock_irqrestore(&uap->port.lock, flags);
472 static void pl010_set_ldisc(struct uart_port *port, struct ktermios *termios)
475 port->flags |= UPF_HARDPPS_CD;
476 spin_lock_irq(&port->lock);
477 pl010_enable_ms(port);
478 spin_unlock_irq(&port->lock);
480 port->flags &= ~UPF_HARDPPS_CD;
481 if (!UART_ENABLE_MS(port, termios->c_cflag)) {
482 spin_lock_irq(&port->lock);
483 pl010_disable_ms(port);
484 spin_unlock_irq(&port->lock);
489 static const char *pl010_type(struct uart_port *port)
491 return port->type == PORT_AMBA ? "AMBA" : NULL;
495 * Release the memory region(s) being used by 'port'
497 static void pl010_release_port(struct uart_port *port)
499 release_mem_region(port->mapbase, UART_PORT_SIZE);
503 * Request the memory region(s) being used by 'port'
505 static int pl010_request_port(struct uart_port *port)
507 return request_mem_region(port->mapbase, UART_PORT_SIZE, "uart-pl010")
512 * Configure/autoconfigure the port.
514 static void pl010_config_port(struct uart_port *port, int flags)
517 port->type = PORT_AMBA;
518 pl010_request_port(port);
525 static int pl010_verify_port(struct uart_port *port, struct serial_struct *ser)
561 static void pl010_console_putchar(struct uart_port *port, int ch)
564 container_of(port, struct uart_amba_port, port);
568 status = readb(uap->port.membase + UART01x_FR);
571 writel(ch, uap->port.membase + UART01x_DR);
585 old_cr = readb(uap->port.membase + UART010_CR);
586 writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
588 uart_console_write(&uap->port, s, count, pl010_console_putchar);
595 status = readb(uap->port.membase + UART01x_FR);
598 writel(old_cr, uap->port.membase + UART010_CR);
607 if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
609 lcr_h = readb(uap->port.membase + UART010_LCRH);
624 quot = readb(uap->port.membase + UART010_LCRL) |
625 readb(uap->port.membase + UART010_LCRM) << 8;
626 *baud = uap->port.uartclk / (16 * (quot + 1));
641 * if so, search for the first available port that does have
654 uap->port.uartclk = clk_get_rate(uap->clk);
661 return uart_set_options(&uap->port, co, baud, parity, bits, flow);
718 uap->port.dev = &dev->dev;
719 uap->port.mapbase = dev->res.start;
720 uap->port.membase = base;
721 uap->port.iotype = UPIO_MEM;
722 uap->port.irq = dev->irq[0];
723 uap->port.fifosize = 16;
724 uap->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_AMBA_PL010_CONSOLE);
725 uap->port.ops = &amba_pl010_pops;
726 uap->port.flags = UPF_BOOT_AUTOCONF;
727 uap->port.line = i;
740 dev_err(uap->port.dev,
747 ret = uart_add_one_port(&amba_reg, &uap->port);
760 uart_remove_one_port(&amba_reg, &uap->port);
778 uart_suspend_port(&amba_reg, &uap->port);
788 uart_resume_port(&amba_reg, &uap->port);
832 MODULE_DESCRIPTION("ARM AMBA serial port driver");