Lines Matching defs:uap
61 struct uart_amba_port *uap =
65 cr = readb(uap->port.membase + UART010_CR);
67 writel(cr, uap->port.membase + UART010_CR);
72 struct uart_amba_port *uap =
76 cr = readb(uap->port.membase + UART010_CR);
78 writel(cr, uap->port.membase + UART010_CR);
83 struct uart_amba_port *uap =
87 cr = readb(uap->port.membase + UART010_CR);
89 writel(cr, uap->port.membase + UART010_CR);
94 struct uart_amba_port *uap = (struct uart_amba_port *)port;
97 cr = readb(uap->port.membase + UART010_CR);
99 writel(cr, uap->port.membase + UART010_CR);
104 struct uart_amba_port *uap =
108 cr = readb(uap->port.membase + UART010_CR);
110 writel(cr, uap->port.membase + UART010_CR);
113 static void pl010_rx_chars(struct uart_amba_port *uap)
117 status = readb(uap->port.membase + UART01x_FR);
119 ch = readb(uap->port.membase + UART01x_DR);
122 uap->port.icount.rx++;
128 rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
130 writel(0, uap->port.membase + UART01x_ECR);
134 uap->port.icount.brk++;
135 if (uart_handle_break(&uap->port))
138 uap->port.icount.parity++;
140 uap->port.icount.frame++;
142 uap->port.icount.overrun++;
144 rsr &= uap->port.read_status_mask;
154 if (uart_handle_sysrq_char(&uap->port, ch))
157 uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag);
160 status = readb(uap->port.membase + UART01x_FR);
162 spin_unlock(&uap->port.lock);
163 tty_flip_buffer_push(&uap->port.state->port);
164 spin_lock(&uap->port.lock);
167 static void pl010_tx_chars(struct uart_amba_port *uap)
169 struct circ_buf *xmit = &uap->port.state->xmit;
172 if (uap->port.x_char) {
173 writel(uap->port.x_char, uap->port.membase + UART01x_DR);
174 uap->port.icount.tx++;
175 uap->port.x_char = 0;
178 if (uart_circ_empty(xmit) || uart_tx_stopped(&uap->port)) {
179 pl010_stop_tx(&uap->port);
183 count = uap->port.fifosize >> 1;
185 writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
187 uap->port.icount.tx++;
193 uart_write_wakeup(&uap->port);
196 pl010_stop_tx(&uap->port);
199 static void pl010_modem_status(struct uart_amba_port *uap)
203 writel(0, uap->port.membase + UART010_ICR);
205 status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
207 delta = status ^ uap->old_status;
208 uap->old_status = status;
214 uart_handle_dcd_change(&uap->port, status & UART01x_FR_DCD);
217 uap->port.icount.dsr++;
220 uart_handle_cts_change(&uap->port, status & UART01x_FR_CTS);
222 wake_up_interruptible(&uap->port.state->port.delta_msr_wait);
227 struct uart_amba_port *uap = dev_id;
231 spin_lock(&uap->port.lock);
233 status = readb(uap->port.membase + UART010_IIR);
237 pl010_rx_chars(uap);
239 pl010_modem_status(uap);
241 pl010_tx_chars(uap);
246 status = readb(uap->port.membase + UART010_IIR);
252 spin_unlock(&uap->port.lock);
259 struct uart_amba_port *uap =
261 unsigned int status = readb(uap->port.membase + UART01x_FR);
267 struct uart_amba_port *uap =
272 status = readb(uap->port.membase + UART01x_FR);
285 struct uart_amba_port *uap =
288 if (uap->data)
289 uap->data->set_mctrl(uap->dev, uap->port.membase, mctrl);
294 struct uart_amba_port *uap =
299 spin_lock_irqsave(&uap->port.lock, flags);
300 lcr_h = readb(uap->port.membase + UART010_LCRH);
305 writel(lcr_h, uap->port.membase + UART010_LCRH);
306 spin_unlock_irqrestore(&uap->port.lock, flags);
311 struct uart_amba_port *uap =
318 retval = clk_prepare_enable(uap->clk);
322 uap->port.uartclk = clk_get_rate(uap->clk);
327 retval = request_irq(uap->port.irq, pl010_int, 0, "uart-pl010", uap);
334 uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
340 uap->port.membase + UART010_CR);
345 clk_disable_unprepare(uap->clk);
352 struct uart_amba_port *uap =
358 free_irq(uap->port.irq, uap);
363 writel(0, uap->port.membase + UART010_CR);
366 writel(readb(uap->port.membase + UART010_LCRH) &
368 uap->port.membase + UART010_LCRH);
373 clk_disable_unprepare(uap->clk);
380 struct uart_amba_port *uap =
389 baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
413 if (uap->port.fifosize > 1)
416 spin_lock_irqsave(&uap->port.lock, flags);
423 uap->port.read_status_mask = UART01x_RSR_OE;
425 uap->port.read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
427 uap->port.read_status_mask |= UART01x_RSR_BE;
432 uap->port.ignore_status_mask = 0;
434 uap->port.ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
436 uap->port.ignore_status_mask |= UART01x_RSR_BE;
442 uap->port.ignore_status_mask |= UART01x_RSR_OE;
449 uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX;
451 old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
458 writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
459 writel(quot & 0xff, uap->port.membase + UART010_LCRL);
466 writel(lcr_h, uap->port.membase + UART010_LCRH);
467 writel(old_cr, uap->port.membase + UART010_CR);
469 spin_unlock_irqrestore(&uap->port.lock, flags);
563 struct uart_amba_port *uap =
568 status = readb(uap->port.membase + UART01x_FR);
571 writel(ch, uap->port.membase + UART01x_DR);
577 struct uart_amba_port *uap = amba_ports[co->index];
580 clk_enable(uap->clk);
585 old_cr = readb(uap->port.membase + UART010_CR);
586 writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
588 uart_console_write(&uap->port, s, count, pl010_console_putchar);
595 status = readb(uap->port.membase + UART01x_FR);
598 writel(old_cr, uap->port.membase + UART010_CR);
600 clk_disable(uap->clk);
604 pl010_console_get_options(struct uart_amba_port *uap, int *baud,
607 if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
609 lcr_h = readb(uap->port.membase + UART010_LCRH);
624 quot = readb(uap->port.membase + UART010_LCRL) |
625 readb(uap->port.membase + UART010_LCRM) << 8;
626 *baud = uap->port.uartclk / (16 * (quot + 1));
632 struct uart_amba_port *uap;
646 uap = amba_ports[co->index];
647 if (!uap)
650 ret = clk_prepare(uap->clk);
654 uap->port.uartclk = clk_get_rate(uap->clk);
659 pl010_console_get_options(uap, &baud, &parity, &bits);
661 return uart_set_options(&uap->port, co, baud, parity, bits, flow);
693 struct uart_amba_port *uap;
704 uap = devm_kzalloc(&dev->dev, sizeof(struct uart_amba_port),
706 if (!uap)
714 uap->clk = devm_clk_get(&dev->dev, NULL);
715 if (IS_ERR(uap->clk))
716 return PTR_ERR(uap->clk);
718 uap->port.dev = &dev->dev;
719 uap->port.mapbase = dev->res.start;
720 uap->port.membase = base;
721 uap->port.iotype = UPIO_MEM;
722 uap->port.irq = dev->irq[0];
723 uap->port.fifosize = 16;
724 uap->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_AMBA_PL010_CONSOLE);
725 uap->port.ops = &amba_pl010_pops;
726 uap->port.flags = UPF_BOOT_AUTOCONF;
727 uap->port.line = i;
728 uap->dev = dev;
729 uap->data = dev_get_platdata(&dev->dev);
731 amba_ports[i] = uap;
733 amba_set_drvdata(dev, uap);
740 dev_err(uap->port.dev,
747 ret = uart_add_one_port(&amba_reg, &uap->port);
756 struct uart_amba_port *uap = amba_get_drvdata(dev);
760 uart_remove_one_port(&amba_reg, &uap->port);
763 if (amba_ports[i] == uap)
775 struct uart_amba_port *uap = dev_get_drvdata(dev);
777 if (uap)
778 uart_suspend_port(&amba_reg, &uap->port);
785 struct uart_amba_port *uap = dev_get_drvdata(dev);
787 if (uap)
788 uart_resume_port(&amba_reg, &uap->port);