Lines Matching refs:uart
44 struct tegra_uart *uart;
49 uart = devm_kzalloc(&pdev->dev, sizeof(*uart), GFP_KERNEL);
50 if (!uart)
89 uart->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL);
90 if (IS_ERR(uart->rst))
91 return PTR_ERR(uart->rst);
95 uart->clk = devm_clk_get(&pdev->dev, NULL);
96 if (IS_ERR(uart->clk)) {
101 ret = clk_prepare_enable(uart->clk);
105 port->uartclk = clk_get_rate(uart->clk);
108 ret = reset_control_deassert(uart->rst);
116 platform_set_drvdata(pdev, uart);
117 uart->line = ret;
122 reset_control_assert(uart->rst);
124 clk_disable_unprepare(uart->clk);
131 struct tegra_uart *uart = platform_get_drvdata(pdev);
133 serial8250_unregister_port(uart->line);
134 reset_control_assert(uart->rst);
135 clk_disable_unprepare(uart->clk);
143 struct tegra_uart *uart = dev_get_drvdata(dev);
144 struct uart_8250_port *port8250 = serial8250_get_port(uart->line);
147 serial8250_suspend_port(uart->line);
150 clk_disable_unprepare(uart->clk);
157 struct tegra_uart *uart = dev_get_drvdata(dev);
158 struct uart_8250_port *port8250 = serial8250_get_port(uart->line);
162 clk_prepare_enable(uart->clk);
164 serial8250_resume_port(uart->line);
174 { .compatible = "nvidia,tegra20-uart", },
187 .name = "tegra-uart",