Lines Matching defs:base
873 * Basic configuration is done over a region of 32 I/O ports. The base
905 /* search for the base-ioport */
958 ioport &= 0x0000FF00; /* the actual base address */
1107 unsigned long base = port->port.iobase;
1110 LCR = inb(base + UART_LCR);
1111 outb(0xBF, base + UART_LCR);
1112 val = inb(base + UART_SCR);
1113 outb(LCR, base + UART_LCR);
1119 unsigned long base = port->port.iobase;
1122 LCR = inb(base + UART_LCR);
1123 outb(0xBF, base + UART_LCR);
1124 inb(base + UART_SCR);
1125 outb(qopr, base + UART_SCR);
1126 outb(LCR, base + UART_LCR);
1131 unsigned long base = port->port.iobase;
1134 LCR = inb(base + UART_LCR);
1135 outb(0xBF, base + UART_LCR);
1136 val = inb(base + UART_SCR);
1137 outb(val | 0x10, base + UART_SCR);
1138 qmcr = inb(base + UART_MCR);
1139 outb(val, base + UART_SCR);
1140 outb(LCR, base + UART_LCR);
1147 unsigned long base = port->port.iobase;
1150 LCR = inb(base + UART_LCR);
1151 outb(0xBF, base + UART_LCR);
1152 val = inb(base + UART_SCR);
1153 outb(val | 0x10, base + UART_SCR);
1154 outb(qmcr, base + UART_MCR);
1155 outb(val, base + UART_SCR);
1156 outb(LCR, base + UART_LCR);
1161 unsigned long base = port->port.iobase;
1164 LCR = inb(base + UART_LCR);
1165 outb(0xBF, base + UART_LCR);
1166 val = inb(base + UART_SCR);
1170 outb(LCR, base + UART_LCR);
1265 unsigned long base = pci_resource_start(dev, 0);
1266 if (base) {
1269 outl(inl(base + 0x38) | 0x00002000, base + 0x38);
1270 tmp = inl(base + 0x3c);
1271 outl(tmp | 0x01000000, base + 0x3c);
1272 outl(tmp &= ~0x01000000, base + 0x3c);
1934 * (ie, baud base, number and location of ports, etc)
2953 * offset 0x10 from the UART base, while UART_IER is defined as 1