Lines Matching refs:ChP
379 Call: sClrBreak(ChP)
380 CHANNEL_T *ChP; Ptr to channel structure
382 #define sClrBreak(ChP) \
384 (ChP)->TxControl[3] &= ~SETBREAK; \
385 out32((ChP)->IndexAddr,(ChP)->TxControl); \
391 Call: sClrDTR(ChP)
392 CHANNEL_T *ChP; Ptr to channel structure
394 #define sClrDTR(ChP) \
396 (ChP)->TxControl[3] &= ~SET_DTR; \
397 out32((ChP)->IndexAddr,(ChP)->TxControl); \
403 Call: sClrRTS(ChP)
404 CHANNEL_T *ChP; Ptr to channel structure
406 #define sClrRTS(ChP) \
408 if ((ChP)->rtsToggle) break; \
409 (ChP)->TxControl[3] &= ~SET_RTS; \
410 out32((ChP)->IndexAddr,(ChP)->TxControl); \
416 Call: sClrTxXOFF(ChP)
417 CHANNEL_T *ChP; Ptr to channel structure
419 #define sClrTxXOFF(ChP) \
421 sOutB((ChP)->Cmd,TXOVERIDE | (Byte_t)(ChP)->ChanNum); \
422 sOutB((ChP)->Cmd,(Byte_t)(ChP)->ChanNum); \
478 Call: sDisCTSFlowCtl(ChP)
479 CHANNEL_T *ChP; Ptr to channel structure
481 #define sDisCTSFlowCtl(ChP) \
483 (ChP)->TxControl[2] &= ~CTSFC_EN; \
484 out32((ChP)->IndexAddr,(ChP)->TxControl); \
490 Call: sDisIXANY(ChP)
491 CHANNEL_T *ChP; Ptr to channel structure
493 #define sDisIXANY(ChP) \
495 (ChP)->R[0x0e] = 0x86; \
496 out32((ChP)->IndexAddr,&(ChP)->R[0x0c]); \
502 Call: sDisParity(ChP)
503 CHANNEL_T *ChP; Ptr to channel structure
507 #define sDisParity(ChP) \
509 (ChP)->TxControl[2] &= ~PARITY_EN; \
510 out32((ChP)->IndexAddr,(ChP)->TxControl); \
516 Call: sDisRTSToggle(ChP)
517 CHANNEL_T *ChP; Ptr to channel structure
519 #define sDisRTSToggle(ChP) \
521 (ChP)->TxControl[2] &= ~RTSTOG_EN; \
522 out32((ChP)->IndexAddr,(ChP)->TxControl); \
523 (ChP)->rtsToggle = 0; \
529 Call: sDisRxFIFO(ChP)
530 CHANNEL_T *ChP; Ptr to channel structure
532 #define sDisRxFIFO(ChP) \
534 (ChP)->R[0x32] = 0x0a; \
535 out32((ChP)->IndexAddr,&(ChP)->R[0x30]); \
541 Call: sDisRxStatusMode(ChP)
542 CHANNEL_T *ChP; Ptr to channel structure
547 #define sDisRxStatusMode(ChP) sOutW((ChP)->ChanStat,0)
552 Call: sDisTransmit(ChP)
553 CHANNEL_T *ChP; Ptr to channel structure
559 #define sDisTransmit(ChP) \
561 (ChP)->TxControl[3] &= ~TX_ENABLE; \
562 out32((ChP)->IndexAddr,(ChP)->TxControl); \
568 Call: sDisTxSoftFlowCtl(ChP)
569 CHANNEL_T *ChP; Ptr to channel structure
571 #define sDisTxSoftFlowCtl(ChP) \
573 (ChP)->R[0x06] = 0x8a; \
574 out32((ChP)->IndexAddr,&(ChP)->R[0x04]); \
593 Call: sEnCTSFlowCtl(ChP)
594 CHANNEL_T *ChP; Ptr to channel structure
596 #define sEnCTSFlowCtl(ChP) \
598 (ChP)->TxControl[2] |= CTSFC_EN; \
599 out32((ChP)->IndexAddr,(ChP)->TxControl); \
605 Call: sEnIXANY(ChP)
606 CHANNEL_T *ChP; Ptr to channel structure
608 #define sEnIXANY(ChP) \
610 (ChP)->R[0x0e] = 0x21; \
611 out32((ChP)->IndexAddr,&(ChP)->R[0x0c]); \
617 Call: sEnParity(ChP)
618 CHANNEL_T *ChP; Ptr to channel structure
625 #define sEnParity(ChP) \
627 (ChP)->TxControl[2] |= PARITY_EN; \
628 out32((ChP)->IndexAddr,(ChP)->TxControl); \
634 Call: sEnRTSToggle(ChP)
635 CHANNEL_T *ChP; Ptr to channel structure
639 #define sEnRTSToggle(ChP) \
641 (ChP)->RxControl[2] &= ~RTSFC_EN; \
642 out32((ChP)->IndexAddr,(ChP)->RxControl); \
643 (ChP)->TxControl[2] |= RTSTOG_EN; \
644 (ChP)->TxControl[3] &= ~SET_RTS; \
645 out32((ChP)->IndexAddr,(ChP)->TxControl); \
646 (ChP)->rtsToggle = 1; \
652 Call: sEnRxFIFO(ChP)
653 CHANNEL_T *ChP; Ptr to channel structure
655 #define sEnRxFIFO(ChP) \
657 (ChP)->R[0x32] = 0x08; \
658 out32((ChP)->IndexAddr,&(ChP)->R[0x30]); \
664 Call: sEnRxProcessor(ChP)
665 CHANNEL_T *ChP; Ptr to channel structure
676 #define sEnRxProcessor(ChP) \
678 (ChP)->RxControl[2] |= RXPROC_EN; \
679 out32((ChP)->IndexAddr,(ChP)->RxControl); \
685 Call: sEnRxStatusMode(ChP)
686 CHANNEL_T *ChP; Ptr to channel structure
692 #define sEnRxStatusMode(ChP) sOutW((ChP)->ChanStat,STATMODE)
697 Call: sEnTransmit(ChP)
698 CHANNEL_T *ChP; Ptr to channel structure
700 #define sEnTransmit(ChP) \
702 (ChP)->TxControl[3] |= TX_ENABLE; \
703 out32((ChP)->IndexAddr,(ChP)->TxControl); \
709 Call: sEnTxSoftFlowCtl(ChP)
710 CHANNEL_T *ChP; Ptr to channel structure
712 #define sEnTxSoftFlowCtl(ChP) \
714 (ChP)->R[0x06] = 0xc5; \
715 out32((ChP)->IndexAddr,&(ChP)->R[0x04]); \
743 Call: sGetChanIntID(ChP)
744 CHANNEL_T *ChP; Ptr to channel structure
754 #define sGetChanIntID(ChP) (sInB((ChP)->IntID) & (RXF_TRIG | TXFIFO_MT | SRC_INT | DELTA_CD | DELTA_CTS | DELTA_DSR))
759 Call: sGetChanNum(ChP)
760 CHANNEL_T *ChP; Ptr to channel structure
764 #define sGetChanNum(ChP) (ChP)->ChanNum
769 Call: sGetChanStatus(ChP)
770 CHANNEL_T *ChP; Ptr to channel structure
792 #define sGetChanStatus(ChP) sInW((ChP)->ChanStat)
797 Call: sGetChanStatusLo(ChP)
798 CHANNEL_T *ChP; Ptr to channel structure
808 #define sGetChanStatusLo(ChP) sInB((ByteIO_t)(ChP)->ChanStat)
815 #define sGetChanRI(ChP) ((ChP)->CtlP->AltChanRingIndicator ? \
816 (sInB((ByteIO_t)((ChP)->ChanStat+8)) & DSR_ACT) : \
817 (((ChP)->CtlP->boardType == ROCKET_TYPE_PC104) ? \
818 (!(sInB((ChP)->CtlP->AiopIO[3]) & sBitMapSetTbl[(ChP)->ChanNum])) : \
855 Call: sGetRxCnt(ChP)
856 CHANNEL_T *ChP; Ptr to channel structure
861 #define sGetRxCnt(ChP) sInW((ChP)->TxRxCount)
866 Call: sGetTxCnt(ChP)
867 CHANNEL_T *ChP; Ptr to channel structure
872 #define sGetTxCnt(ChP) sInB((ByteIO_t)(ChP)->TxRxCount)
877 Call: sGetTxRxDataIO(ChP)
878 CHANNEL_T *ChP; Ptr to channel structure
881 #define sGetTxRxDataIO(ChP) (ChP)->TxRxData
886 Call: sInitChanDefaults(ChP)
887 CHANNEL_T *ChP; Ptr to the channel structure
892 #define sInitChanDefaults(ChP) \
894 (ChP)->CtlP = NULLCTLPTR; \
895 (ChP)->AiopNum = NULLAIOP; \
896 (ChP)->ChanID = AIOPID_NULL; \
897 (ChP)->ChanNum = NULLCHAN; \
916 Call: sSendBreak(ChP)
917 CHANNEL_T *ChP; Ptr to channel structure
919 #define sSendBreak(ChP) \
921 (ChP)->TxControl[3] |= SETBREAK; \
922 out32((ChP)->IndexAddr,(ChP)->TxControl); \
928 Call: sSetBaud(ChP,Divisor)
929 CHANNEL_T *ChP; Ptr to channel structure
932 #define sSetBaud(ChP,DIVISOR) \
934 (ChP)->BaudDiv[2] = (Byte_t)(DIVISOR); \
935 (ChP)->BaudDiv[3] = (Byte_t)((DIVISOR) >> 8); \
936 out32((ChP)->IndexAddr,(ChP)->BaudDiv); \
942 Call: sSetData7(ChP)
943 CHANNEL_T *ChP; Ptr to channel structure
945 #define sSetData7(ChP) \
947 (ChP)->TxControl[2] &= ~DATA8BIT; \
948 out32((ChP)->IndexAddr,(ChP)->TxControl); \
954 Call: sSetData8(ChP)
955 CHANNEL_T *ChP; Ptr to channel structure
957 #define sSetData8(ChP) \
959 (ChP)->TxControl[2] |= DATA8BIT; \
960 out32((ChP)->IndexAddr,(ChP)->TxControl); \
966 Call: sSetDTR(ChP)
967 CHANNEL_T *ChP; Ptr to channel structure
969 #define sSetDTR(ChP) \
971 (ChP)->TxControl[3] |= SET_DTR; \
972 out32((ChP)->IndexAddr,(ChP)->TxControl); \
978 Call: sSetEvenParity(ChP)
979 CHANNEL_T *ChP; Ptr to channel structure
986 #define sSetEvenParity(ChP) \
988 (ChP)->TxControl[2] |= EVEN_PAR; \
989 out32((ChP)->IndexAddr,(ChP)->TxControl); \
995 Call: sSetOddParity(ChP)
996 CHANNEL_T *ChP; Ptr to channel structure
1003 #define sSetOddParity(ChP) \
1005 (ChP)->TxControl[2] &= ~EVEN_PAR; \
1006 out32((ChP)->IndexAddr,(ChP)->TxControl); \
1012 Call: sSetRTS(ChP)
1013 CHANNEL_T *ChP; Ptr to channel structure
1015 #define sSetRTS(ChP) \
1017 if ((ChP)->rtsToggle) break; \
1018 (ChP)->TxControl[3] |= SET_RTS; \
1019 out32((ChP)->IndexAddr,(ChP)->TxControl); \
1025 Call: sSetRxProcessor(ChP,Level)
1026 CHANNEL_T *ChP; Ptr to channel structure
1041 #define sSetRxTrigger(ChP,LEVEL) \
1043 (ChP)->RxControl[2] &= ~TRIG_MASK; \
1044 (ChP)->RxControl[2] |= LEVEL; \
1045 out32((ChP)->IndexAddr,(ChP)->RxControl); \
1051 Call: sSetStop1(ChP)
1052 CHANNEL_T *ChP; Ptr to channel structure
1054 #define sSetStop1(ChP) \
1056 (ChP)->TxControl[2] &= ~STOP2; \
1057 out32((ChP)->IndexAddr,(ChP)->TxControl); \
1063 Call: sSetStop2(ChP)
1064 CHANNEL_T *ChP; Ptr to channel structure
1066 #define sSetStop2(ChP) \
1068 (ChP)->TxControl[2] |= STOP2; \
1069 out32((ChP)->IndexAddr,(ChP)->TxControl); \
1075 Call: sSetTxXOFFChar(ChP,Ch)
1076 CHANNEL_T *ChP; Ptr to channel structure
1079 #define sSetTxXOFFChar(ChP,CH) \
1081 (ChP)->R[0x07] = (CH); \
1082 out32((ChP)->IndexAddr,&(ChP)->R[0x04]); \
1088 Call: sSetTxXONChar(ChP,Ch)
1089 CHANNEL_T *ChP; Ptr to channel structure
1092 #define sSetTxXONChar(ChP,CH) \
1094 (ChP)->R[0x0b] = (CH); \
1095 out32((ChP)->IndexAddr,&(ChP)->R[0x08]); \
1101 Call: sStartRxProcessor(ChP)
1102 CHANNEL_T *ChP; Ptr to channel structure
1108 #define sStartRxProcessor(ChP) out32((ChP)->IndexAddr,&(ChP)->R[0])