Lines Matching defs:DBG1
66 #define DBG1(args...) DBG_(0x01, ##args)
83 DBG1("SENDING: '%s' (%d+n)", tbuf, len__); \
85 DBG1("SENDING: '%s' (%d)", tbuf, len__); \
638 DBG1("Second phase, configuring card");
645 DBG1("toggle ports: MDM UL:%d MDM DL:%d, DIAG DL:%d",
668 DBG1("First phase: pushing upload buffers, clearing download");
689 DBG1("First phase done");
793 /* DBG1( "%d bytes port: %d", size, index); */
796 DBG1("No room in tty, don't read data, don't ack interrupt, "
895 DBG1("The Base Band sends this value as a response to a "
929 DBG1("0x%04X->0x%04X", *((u16 *)&dc->port[port].ctrl_dl),
936 DBG1("Disable interrupt (0x%04X) on port: %d",
943 DBG1("Enable interrupt (0x%04X) on port: %d",
945 DBG1("Data in buffer [%d], enable transmit! ",
949 DBG1("No data in buffer...");
954 DBG1(" No change in mctrl");
969 DBG1("port: %d DCD(%d), CTS(%d), RI(%d), DSR(%d)",
1163 DBG1("CTRL_UL");
1400 DBG1("base_addr: %p", dc->base_addr);
1462 DBG1(" ");
1496 DBG1("sending flow control 0x%04X", *((u16 *)&ctrl));
1535 DBG1("SETTING DTR index: %d, dtr: %d", tty->index, dtr);
1572 DBG1("open: %d", port->token_dl);
1594 DBG1("close: %d", port->token_dl);
1628 /* DBG1( "WRITEx: %d, index = %d", count, index); */
1755 DBG1("******** IOCTL, cmd: %d", cmd);
1766 DBG1("ERR: 0x%08X, %d", cmd, cmd);
1782 DBG1("UNTHROTTLE");
1799 DBG1("THROTTLE");