Lines Matching defs:throt
214 /* get THROT_PSKIP_xxx offset per LIGHT/HEAVY throt and CPU/GPU dev */
216 #define THROT_PSKIP_CTRL(throt, dev) (THROT_PSKIP_CTRL_LITE_CPU + \
217 (THROT_OFFSET * throt) + (8 * dev))
218 #define THROT_PSKIP_RAMP(throt, dev) (THROT_PSKIP_RAMP_LITE_CPU + \
219 (THROT_OFFSET * throt) + (8 * dev))
221 /* get THROT_xxx_CTRL offset per LIGHT/HEAVY throt */
222 #define THROT_PRIORITY_CTRL(throt) (THROT_PRIORITY_LITE + \
223 (THROT_OFFSET * throt))
224 #define THROT_DELAY_CTRL(throt) (THROT_DELAY_LITE + \
225 (THROT_OFFSET * throt))
228 #define ALARM_CFG(throt) (OC1_CFG + \
229 (ALARM_OFFSET * (throt - THROTTLE_OC1)))
231 #define ALARM_CNT_THRESHOLD(throt) (OC1_CNT_THRESHOLD + \
232 (ALARM_OFFSET * (throt - THROTTLE_OC1)))
234 #define ALARM_THROTTLE_PERIOD(throt) (OC1_THROTTLE_PERIOD + \
235 (ALARM_OFFSET * (throt - THROTTLE_OC1)))
237 #define ALARM_ALARM_COUNT(throt) (OC1_ALARM_COUNT + \
238 (ALARM_OFFSET * (throt - THROTTLE_OC1)))
240 #define ALARM_FILTER(throt) (OC1_FILTER + \
241 (ALARM_OFFSET * (throt - THROTTLE_OC1)))
243 #define ALARM_STATS(throt) (OC1_STATS + \
244 (4 * (throt - THROTTLE_OC1)))
520 unsigned int throt;
529 throt = stc->id;
530 reg_off = THERMCTL_LVL_REG(sg->thermctl_lvl0_offset, throt + 1);
532 if (throt == THROTTLE_LIGHT) {
538 if (throt != THROTTLE_HEAVY)
540 "invalid throt id %d - assuming HEAVY",
541 throt);
1658 "nvidia,cpu-throt-level" :
1659 "nvidia,cpu-throt-percent", &val);
1672 ret = of_property_read_u32(np, "nvidia,gpu-throt-level", &val);
1681 dev_err(dev, "throttle-cfg: %s: no throt prop or invalid prop\n",
1809 * @throt: the LIGHT/HEAVY of throttle event id
1812 * function programs the pulse skippers based on @throt and platform
1819 enum soctherm_throttle_id throt)
1824 switch (ts->throt_cfgs[throt].cpu_throt_level) {
1839 r = readl(ts->regs + THROT_PSKIP_CTRL(throt, THROTTLE_DEV_CPU));
1843 writel(r, ts->regs + THROT_PSKIP_CTRL(throt, THROTTLE_DEV_CPU));
1847 writel(r, ts->regs + THROT_PSKIP_RAMP(throt, THROTTLE_DEV_CPU));
1853 * @throt: the LIGHT/HEAVY of throttle event id
1856 * function programs the pulse skippers based on @throt and platform
1863 enum soctherm_throttle_id throt)
1869 depth = ts->throt_cfgs[throt].cpu_throt_depth;
1872 r = readl(ts->regs + THROT_PSKIP_CTRL(throt, THROTTLE_DEV_CPU));
1876 writel(r, ts->regs + THROT_PSKIP_CTRL(throt, THROTTLE_DEV_CPU));
1878 r = readl(ts->regs + THROT_PSKIP_RAMP(throt, THROTTLE_DEV_CPU));
1881 writel(r, ts->regs + THROT_PSKIP_RAMP(throt, THROTTLE_DEV_CPU));
1887 * @throt: the LIGHT/HEAVY of throttle event id
1895 enum soctherm_throttle_id throt)
1899 level = ts->throt_cfgs[throt].gpu_throt_level;
1901 r = readl(ts->regs + THROT_PSKIP_CTRL(throt, THROTTLE_DEV_GPU));
1904 writel(r, ts->regs + THROT_PSKIP_CTRL(throt, THROTTLE_DEV_GPU));
1908 enum soctherm_throttle_id throt)
1911 struct soctherm_oc_cfg *oc = &ts->throt_cfgs[throt].oc_cfg;
1920 writel(r, ts->regs + ALARM_CFG(throt));
1921 writel(oc->throt_period, ts->regs + ALARM_THROTTLE_PERIOD(throt));
1922 writel(oc->alarm_cnt_thresh, ts->regs + ALARM_CNT_THRESHOLD(throt));
1923 writel(oc->alarm_filter, ts->regs + ALARM_FILTER(throt));
1924 soctherm_oc_intr_enable(ts, throt, oc->intr_en);
1932 * @throt: the LIGHT/HEAVY of the throttle event id.
1938 enum soctherm_throttle_id throt)
1941 struct soctherm_throt_cfg stc = ts->throt_cfgs[throt];
1946 if ((throt >= THROTTLE_OC1) && (soctherm_oc_cfg_program(ts, throt)))
1951 throttlectl_cpu_level_select(ts, throt);
1953 throttlectl_cpu_mn(ts, throt);
1955 throttlectl_gpu_level_select(ts, throt);
1958 writel(r, ts->regs + THROT_PRIORITY_CTRL(throt));
1961 writel(r, ts->regs + THROT_DELAY_CTRL(throt));