Lines Matching refs:mt
254 struct mtk_thermal *mt;
552 * @mt: The thermal controller
559 static int raw_to_mcelsius_v1(struct mtk_thermal *mt, int sensno, s32 raw)
566 tmp /= mt->conf->cali_val + mt->o_slope;
567 tmp /= 10000 + mt->adc_ge;
568 tmp *= raw - mt->vts[sensno] - 3350;
571 return mt->degc_cali * 500 - tmp;
574 static int raw_to_mcelsius_v2(struct mtk_thermal *mt, int sensno, s32 raw)
587 g_gain = 10000 + (((mt->adc_ge - 512) * 10000) >> 12);
588 g_oe = mt->adc_oe - 512;
589 format_1 = mt->vts[VTS2] + 3105 - g_oe;
590 format_2 = (mt->degc_cali * 10) >> 1;
596 if (mt->o_slope_sign == 0)
597 tmp = tmp / (165 - mt->o_slope);
599 tmp = tmp / (165 + mt->o_slope);
613 struct mtk_thermal *mt = bank->mt;
616 if (mt->conf->need_switch_bank) {
617 mutex_lock(&mt->lock);
619 val = readl(mt->thermal_base + PTPCORESEL);
622 writel(val, mt->thermal_base + PTPCORESEL);
634 struct mtk_thermal *mt = bank->mt;
636 if (mt->conf->need_switch_bank)
637 mutex_unlock(&mt->lock);
649 struct mtk_thermal *mt = bank->mt;
650 const struct mtk_thermal_data *conf = mt->conf;
655 raw = readl(mt->thermal_base + conf->msr[i]);
657 if (mt->conf->version == MTK_THERMAL_V1) {
659 mt, conf->bank_data[bank->id].sensors[i], raw);
662 mt, conf->bank_data[bank->id].sensors[i], raw);
682 struct mtk_thermal *mt = data;
686 for (i = 0; i < mt->conf->num_banks; i++) {
687 struct mtk_thermal_bank *bank = &mt->banks[i];
705 static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
709 struct mtk_thermal_bank *bank = &mt->banks[num];
710 const struct mtk_thermal_data *conf = mt->conf;
713 int offset = mt->conf->controller_offset[ctrl_id];
714 void __iomem *controller_base = mt->thermal_base + offset;
717 bank->mt = mt;
765 if (mt->conf->version == MTK_THERMAL_V1) {
802 mt->thermal_base + conf->adcpnp[i]);
826 static int mtk_thermal_extract_efuse_v1(struct mtk_thermal *mt, u32 *buf)
833 mt->adc_ge = CALIB_BUF1_ADC_GE_V1(buf[1]);
835 for (i = 0; i < mt->conf->num_sensors; i++) {
836 switch (mt->conf->vts_index[i]) {
838 mt->vts[VTS1] = CALIB_BUF0_VTS_TS1_V1(buf[0]);
841 mt->vts[VTS2] = CALIB_BUF0_VTS_TS2_V1(buf[0]);
844 mt->vts[VTS3] = CALIB_BUF1_VTS_TS3_V1(buf[1]);
847 mt->vts[VTS4] = CALIB_BUF2_VTS_TS4_V1(buf[2]);
850 mt->vts[VTS5] = CALIB_BUF2_VTS_TS5_V1(buf[2]);
853 mt->vts[VTSABB] =
861 mt->degc_cali = CALIB_BUF0_DEGC_CALI_V1(buf[0]);
864 mt->o_slope = -CALIB_BUF0_O_SLOPE_V1(buf[0]);
866 mt->o_slope = CALIB_BUF0_O_SLOPE_V1(buf[0]);
871 static int mtk_thermal_extract_efuse_v2(struct mtk_thermal *mt, u32 *buf)
876 mt->adc_oe = CALIB_BUF0_ADC_OE_V2(buf[0]);
877 mt->adc_ge = CALIB_BUF0_ADC_GE_V2(buf[0]);
878 mt->degc_cali = CALIB_BUF0_DEGC_CALI_V2(buf[0]);
879 mt->o_slope = CALIB_BUF0_O_SLOPE_V2(buf[0]);
880 mt->vts[VTS1] = CALIB_BUF1_VTS_TS1_V2(buf[1]);
881 mt->vts[VTS2] = CALIB_BUF1_VTS_TS2_V2(buf[1]);
882 mt->vts[VTSABB] = CALIB_BUF1_VTS_TSABB_V2(buf[1]);
883 mt->o_slope_sign = CALIB_BUF1_O_SLOPE_SIGN_V2(buf[1]);
889 struct mtk_thermal *mt)
897 mt->adc_ge = 512;
898 for (i = 0; i < mt->conf->num_sensors; i++)
899 mt->vts[i] = 260;
900 mt->degc_cali = 40;
901 mt->o_slope = 0;
923 if (mt->conf->version == MTK_THERMAL_V1)
924 ret = mtk_thermal_extract_efuse_v1(mt, buf);
926 ret = mtk_thermal_extract_efuse_v2(mt, buf);
975 static void mtk_thermal_release_periodic_ts(struct mtk_thermal *mt,
981 writel(0x1, mt->thermal_base + TEMP_MONCTL0);
982 tmp = readl(mt->thermal_base + TEMP_MSRCTL1);
983 writel((tmp & (~0x10e)), mt->thermal_base + TEMP_MSRCTL1);
990 struct mtk_thermal *mt;
996 mt = devm_kzalloc(&pdev->dev, sizeof(*mt), GFP_KERNEL);
997 if (!mt)
1000 mt->conf = of_device_get_match_data(&pdev->dev);
1002 mt->clk_peri_therm = devm_clk_get(&pdev->dev, "therm");
1003 if (IS_ERR(mt->clk_peri_therm))
1004 return PTR_ERR(mt->clk_peri_therm);
1006 mt->clk_auxadc = devm_clk_get(&pdev->dev, "auxadc");
1007 if (IS_ERR(mt->clk_auxadc))
1008 return PTR_ERR(mt->clk_auxadc);
1011 mt->thermal_base = devm_ioremap_resource(&pdev->dev, res);
1012 if (IS_ERR(mt->thermal_base))
1013 return PTR_ERR(mt->thermal_base);
1015 ret = mtk_thermal_get_calibration_data(&pdev->dev, mt);
1019 mutex_init(&mt->lock);
1021 mt->dev = &pdev->dev;
1059 ret = clk_prepare_enable(mt->clk_auxadc);
1065 ret = clk_prepare_enable(mt->clk_peri_therm);
1071 if (mt->conf->version == MTK_THERMAL_V2) {
1073 mtk_thermal_release_periodic_ts(mt, auxadc_base);
1076 for (ctrl_id = 0; ctrl_id < mt->conf->num_controller ; ctrl_id++)
1077 for (i = 0; i < mt->conf->num_banks; i++)
1078 mtk_thermal_init_bank(mt, i, apmixed_phys_base,
1081 platform_set_drvdata(pdev, mt);
1083 tzdev = devm_thermal_zone_of_sensor_register(&pdev->dev, 0, mt,
1093 clk_disable_unprepare(mt->clk_peri_therm);
1095 clk_disable_unprepare(mt->clk_auxadc);
1102 struct mtk_thermal *mt = platform_get_drvdata(pdev);
1104 clk_disable_unprepare(mt->clk_peri_therm);
1105 clk_disable_unprepare(mt->clk_auxadc);