Lines Matching defs:pmic_arb
186 int (*ppid_to_apid)(struct spmi_pmic_arb *pmic_arb, u16 ppid);
188 int (*offset)(struct spmi_pmic_arb *pmic_arb, u8 sid, u16 addr,
193 void __iomem *(*owner_acc_status)(struct spmi_pmic_arb *pmic_arb, u8 m,
195 void __iomem *(*acc_enable)(struct spmi_pmic_arb *pmic_arb, u16 n);
196 void __iomem *(*irq_status)(struct spmi_pmic_arb *pmic_arb, u16 n);
197 void __iomem *(*irq_clear)(struct spmi_pmic_arb *pmic_arb, u16 n);
201 static inline void pmic_arb_base_write(struct spmi_pmic_arb *pmic_arb,
204 writel_relaxed(val, pmic_arb->wr_base + offset);
207 static inline void pmic_arb_set_rd_cmd(struct spmi_pmic_arb *pmic_arb,
210 writel_relaxed(val, pmic_arb->rd_base + offset);
220 pmic_arb_read_data(struct spmi_pmic_arb *pmic_arb, u8 *buf, u32 reg, u8 bc)
222 u32 data = __raw_readl(pmic_arb->rd_base + reg);
233 static void pmic_arb_write_data(struct spmi_pmic_arb *pmic_arb, const u8 *buf,
239 __raw_writel(data, pmic_arb->wr_base + reg);
246 struct spmi_pmic_arb *pmic_arb = spmi_controller_get_drvdata(ctrl);
252 rc = pmic_arb->ver_ops->offset(pmic_arb, sid, addr, ch_type);
294 struct spmi_pmic_arb *pmic_arb = spmi_controller_get_drvdata(ctrl);
300 rc = pmic_arb->ver_ops->offset(pmic_arb, sid, 0, PMIC_ARB_CHANNEL_RW);
307 raw_spin_lock_irqsave(&pmic_arb->lock, flags);
308 pmic_arb_base_write(pmic_arb, offset + PMIC_ARB_CMD, cmd);
309 rc = pmic_arb_wait_for_done(ctrl, pmic_arb->wr_base, sid, 0,
311 raw_spin_unlock_irqrestore(&pmic_arb->lock, flags);
325 struct spmi_pmic_arb *pmic_arb = spmi_controller_get_drvdata(ctrl);
333 return pmic_arb->ver_ops->non_data_cmd(ctrl, opc, sid);
339 struct spmi_pmic_arb *pmic_arb = spmi_controller_get_drvdata(ctrl);
346 rc = pmic_arb->ver_ops->offset(pmic_arb, sid, addr,
368 cmd = pmic_arb->ver_ops->fmt_cmd(opc, sid, addr, bc);
370 raw_spin_lock_irqsave(&pmic_arb->lock, flags);
371 pmic_arb_set_rd_cmd(pmic_arb, offset + PMIC_ARB_CMD, cmd);
372 rc = pmic_arb_wait_for_done(ctrl, pmic_arb->rd_base, sid, addr,
377 pmic_arb_read_data(pmic_arb, buf, offset + PMIC_ARB_RDATA0,
381 pmic_arb_read_data(pmic_arb, buf + 4, offset + PMIC_ARB_RDATA1,
385 raw_spin_unlock_irqrestore(&pmic_arb->lock, flags);
392 struct spmi_pmic_arb *pmic_arb = spmi_controller_get_drvdata(ctrl);
399 rc = pmic_arb->ver_ops->offset(pmic_arb, sid, addr,
423 cmd = pmic_arb->ver_ops->fmt_cmd(opc, sid, addr, bc);
426 raw_spin_lock_irqsave(&pmic_arb->lock, flags);
427 pmic_arb_write_data(pmic_arb, buf, offset + PMIC_ARB_WDATA0,
430 pmic_arb_write_data(pmic_arb, buf + 4, offset + PMIC_ARB_WDATA1,
434 pmic_arb_base_write(pmic_arb, offset + PMIC_ARB_CMD, cmd);
435 rc = pmic_arb_wait_for_done(ctrl, pmic_arb->wr_base, sid, addr,
437 raw_spin_unlock_irqrestore(&pmic_arb->lock, flags);
463 struct spmi_pmic_arb *pmic_arb = irq_data_get_irq_chip_data(d);
467 if (pmic_arb_write_cmd(pmic_arb->spmic, SPMI_CMD_EXT_WRITEL, sid,
469 dev_err_ratelimited(&pmic_arb->spmic->dev, "failed irqchip transaction on %x\n",
475 struct spmi_pmic_arb *pmic_arb = irq_data_get_irq_chip_data(d);
479 if (pmic_arb_read_cmd(pmic_arb->spmic, SPMI_CMD_EXT_READL, sid,
481 dev_err_ratelimited(&pmic_arb->spmic->dev, "failed irqchip transaction on %x\n",
485 static void cleanup_irq(struct spmi_pmic_arb *pmic_arb, u16 apid, int id)
487 u16 ppid = pmic_arb->apid_data[apid].ppid;
492 writel_relaxed(irq_mask, pmic_arb->ver_ops->irq_clear(pmic_arb, apid));
494 if (pmic_arb_write_cmd(pmic_arb->spmic, SPMI_CMD_EXT_WRITEL, sid,
496 dev_err_ratelimited(&pmic_arb->spmic->dev, "failed to ack irq_mask = 0x%x for ppid = %x\n",
499 if (pmic_arb_write_cmd(pmic_arb->spmic, SPMI_CMD_EXT_WRITEL, sid,
501 dev_err_ratelimited(&pmic_arb->spmic->dev, "failed to ack irq_mask = 0x%x for ppid = %x\n",
505 static void periph_interrupt(struct spmi_pmic_arb *pmic_arb, u16 apid)
509 u8 sid = (pmic_arb->apid_data[apid].ppid >> 8) & 0xF;
510 u8 per = pmic_arb->apid_data[apid].ppid & 0xFF;
512 status = readl_relaxed(pmic_arb->ver_ops->irq_status(pmic_arb, apid));
516 irq = irq_find_mapping(pmic_arb->domain,
519 cleanup_irq(pmic_arb, apid, id);
528 struct spmi_pmic_arb *pmic_arb = irq_desc_get_handler_data(desc);
529 const struct pmic_arb_ver_ops *ver_ops = pmic_arb->ver_ops;
531 int first = pmic_arb->min_apid >> 5;
532 int last = pmic_arb->max_apid >> 5;
533 u8 ee = pmic_arb->ee;
541 ver_ops->owner_acc_status(pmic_arb, ee, i));
547 ver_ops->acc_enable(pmic_arb, apid));
549 periph_interrupt(pmic_arb, apid);
558 struct spmi_pmic_arb *pmic_arb = irq_data_get_irq_chip_data(d);
563 writel_relaxed(BIT(irq), pmic_arb->ver_ops->irq_clear(pmic_arb, apid));
579 struct spmi_pmic_arb *pmic_arb = irq_data_get_irq_chip_data(d);
580 const struct pmic_arb_ver_ops *ver_ops = pmic_arb->ver_ops;
586 ver_ops->acc_enable(pmic_arb, apid));
639 struct spmi_pmic_arb *pmic_arb = irq_data_get_irq_chip_data(d);
641 return irq_set_irq_wake(pmic_arb->irq, on);
663 struct spmi_pmic_arb *pmic_arb = irq_data_get_irq_chip_data(d);
669 if (pmic_arb->apid_data[apid].irq_ee != pmic_arb->ee) {
670 dev_err(&pmic_arb->spmic->dev, "failed to xlate sid = %#x, periph = %#x, irq = %u: ee=%u but owner=%u\n",
671 sid, periph, irq, pmic_arb->ee,
672 pmic_arb->apid_data[apid].irq_ee);
680 .name = "pmic_arb",
695 struct spmi_pmic_arb *pmic_arb = d->host_data;
700 dev_dbg(&pmic_arb->spmic->dev, "intspec[0] 0x%1x intspec[1] 0x%02x intspec[2] 0x%02x\n",
703 if (irq_domain_get_of_node(d) != pmic_arb->spmic->dev.of_node)
711 rc = pmic_arb->ver_ops->ppid_to_apid(pmic_arb, ppid);
713 dev_err(&pmic_arb->spmic->dev, "failed to xlate sid = %#x, periph = %#x, irq = %u rc = %d\n",
720 if (apid > pmic_arb->max_apid)
721 pmic_arb->max_apid = apid;
722 if (apid < pmic_arb->min_apid)
723 pmic_arb->min_apid = apid;
728 dev_dbg(&pmic_arb->spmic->dev, "out_hwirq = %lu\n", *out_hwirq);
735 static void qpnpint_irq_domain_map(struct spmi_pmic_arb *pmic_arb,
741 dev_dbg(&pmic_arb->spmic->dev, "virq = %u, hwirq = %lu, type = %u\n",
752 irq_domain_set_info(domain, virq, hwirq, &pmic_arb_irqchip, pmic_arb,
760 struct spmi_pmic_arb *pmic_arb = domain->host_data;
771 qpnpint_irq_domain_map(pmic_arb, domain, virq + i, hwirq + i,
777 static int pmic_arb_ppid_to_apid_v1(struct spmi_pmic_arb *pmic_arb, u16 ppid)
779 u32 *mapping_table = pmic_arb->mapping_table;
785 apid_valid = pmic_arb->ppid_to_apid[ppid];
792 if (!test_and_set_bit(index, pmic_arb->mapping_table_valid))
793 mapping_table[index] = readl_relaxed(pmic_arb->cnfg +
803 pmic_arb->ppid_to_apid[ppid]
805 pmic_arb->apid_data[apid].ppid = ppid;
813 pmic_arb->ppid_to_apid[ppid]
815 pmic_arb->apid_data[apid].ppid = ppid;
825 static int pmic_arb_offset_v1(struct spmi_pmic_arb *pmic_arb, u8 sid, u16 addr,
828 return 0x800 + 0x80 * pmic_arb->channel;
831 static u16 pmic_arb_find_apid(struct spmi_pmic_arb *pmic_arb, u16 ppid)
833 struct apid_data *apidd = &pmic_arb->apid_data[pmic_arb->last_apid];
837 for (apid = pmic_arb->last_apid; ; apid++, apidd++) {
838 offset = pmic_arb->ver_ops->apid_map_offset(apid);
839 if (offset >= pmic_arb->core_size)
842 regval = readl_relaxed(pmic_arb->cnfg +
847 regval = readl_relaxed(pmic_arb->core + offset);
852 pmic_arb->ppid_to_apid[id] = apid | PMIC_ARB_APID_VALID;
859 pmic_arb->last_apid = apid & ~PMIC_ARB_APID_VALID;
864 static int pmic_arb_ppid_to_apid_v2(struct spmi_pmic_arb *pmic_arb, u16 ppid)
868 apid_valid = pmic_arb->ppid_to_apid[ppid];
870 apid_valid = pmic_arb_find_apid(pmic_arb, ppid);
877 static int pmic_arb_read_apid_map_v5(struct spmi_pmic_arb *pmic_arb)
879 struct apid_data *apidd = pmic_arb->apid_data;
894 offset = pmic_arb->ver_ops->apid_map_offset(i);
895 if (offset >= pmic_arb->core_size)
898 regval = readl_relaxed(pmic_arb->core + offset);
904 regval = readl_relaxed(pmic_arb->cnfg +
910 valid = pmic_arb->ppid_to_apid[ppid] & PMIC_ARB_APID_VALID;
911 apid = pmic_arb->ppid_to_apid[ppid] & ~PMIC_ARB_APID_VALID;
912 prev_apidd = &pmic_arb->apid_data[apid];
914 if (!valid || apidd->write_ee == pmic_arb->ee) {
916 pmic_arb->ppid_to_apid[ppid] = i | PMIC_ARB_APID_VALID;
918 prev_apidd->write_ee == pmic_arb->ee) {
927 pmic_arb->last_apid = i;
931 dev_dbg(&pmic_arb->spmic->dev, "PPID APID Write-EE IRQ-EE\n");
933 apid = pmic_arb->ppid_to_apid[ppid];
936 apidd = &pmic_arb->apid_data[apid];
937 dev_dbg(&pmic_arb->spmic->dev, "%#03X %3u %2u %2u\n",
945 static int pmic_arb_ppid_to_apid_v5(struct spmi_pmic_arb *pmic_arb, u16 ppid)
947 if (!(pmic_arb->ppid_to_apid[ppid] & PMIC_ARB_APID_VALID))
950 return pmic_arb->ppid_to_apid[ppid] & ~PMIC_ARB_APID_VALID;
954 static int pmic_arb_offset_v2(struct spmi_pmic_arb *pmic_arb, u8 sid, u16 addr,
962 rc = pmic_arb_ppid_to_apid_v2(pmic_arb, ppid);
967 return 0x1000 * pmic_arb->ee + 0x8000 * apid;
974 static int pmic_arb_offset_v5(struct spmi_pmic_arb *pmic_arb, u8 sid, u16 addr,
982 rc = pmic_arb_ppid_to_apid_v5(pmic_arb, ppid);
989 offset = 0x10000 * pmic_arb->ee + 0x80 * apid;
1010 pmic_arb_owner_acc_status_v1(struct spmi_pmic_arb *pmic_arb, u8 m, u16 n)
1012 return pmic_arb->intr + 0x20 * m + 0x4 * n;
1016 pmic_arb_owner_acc_status_v2(struct spmi_pmic_arb *pmic_arb, u8 m, u16 n)
1018 return pmic_arb->intr + 0x100000 + 0x1000 * m + 0x4 * n;
1022 pmic_arb_owner_acc_status_v3(struct spmi_pmic_arb *pmic_arb, u8 m, u16 n)
1024 return pmic_arb->intr + 0x200000 + 0x1000 * m + 0x4 * n;
1028 pmic_arb_owner_acc_status_v5(struct spmi_pmic_arb *pmic_arb, u8 m, u16 n)
1030 return pmic_arb->intr + 0x10000 * m + 0x4 * n;
1034 pmic_arb_acc_enable_v1(struct spmi_pmic_arb *pmic_arb, u16 n)
1036 return pmic_arb->intr + 0x200 + 0x4 * n;
1040 pmic_arb_acc_enable_v2(struct spmi_pmic_arb *pmic_arb, u16 n)
1042 return pmic_arb->intr + 0x1000 * n;
1046 pmic_arb_acc_enable_v5(struct spmi_pmic_arb *pmic_arb, u16 n)
1048 return pmic_arb->wr_base + 0x100 + 0x10000 * n;
1052 pmic_arb_irq_status_v1(struct spmi_pmic_arb *pmic_arb, u16 n)
1054 return pmic_arb->intr + 0x600 + 0x4 * n;
1058 pmic_arb_irq_status_v2(struct spmi_pmic_arb *pmic_arb, u16 n)
1060 return pmic_arb->intr + 0x4 + 0x1000 * n;
1064 pmic_arb_irq_status_v5(struct spmi_pmic_arb *pmic_arb, u16 n)
1066 return pmic_arb->wr_base + 0x104 + 0x10000 * n;
1070 pmic_arb_irq_clear_v1(struct spmi_pmic_arb *pmic_arb, u16 n)
1072 return pmic_arb->intr + 0xA00 + 0x4 * n;
1076 pmic_arb_irq_clear_v2(struct spmi_pmic_arb *pmic_arb, u16 n)
1078 return pmic_arb->intr + 0x8 + 0x1000 * n;
1082 pmic_arb_irq_clear_v5(struct spmi_pmic_arb *pmic_arb, u16 n)
1084 return pmic_arb->wr_base + 0x108 + 0x10000 * n;
1158 struct spmi_pmic_arb *pmic_arb;
1166 ctrl = spmi_controller_alloc(&pdev->dev, sizeof(*pmic_arb));
1170 pmic_arb = spmi_controller_get_drvdata(ctrl);
1171 pmic_arb->spmic = ctrl;
1180 pmic_arb->core_size = resource_size(res);
1182 pmic_arb->ppid_to_apid = devm_kcalloc(&ctrl->dev, PMIC_ARB_MAX_PPID,
1183 sizeof(*pmic_arb->ppid_to_apid),
1185 if (!pmic_arb->ppid_to_apid) {
1193 pmic_arb->ver_ops = &pmic_arb_v1;
1194 pmic_arb->wr_base = core;
1195 pmic_arb->rd_base = core;
1197 pmic_arb->core = core;
1200 pmic_arb->ver_ops = &pmic_arb_v2;
1202 pmic_arb->ver_ops = &pmic_arb_v3;
1204 pmic_arb->ver_ops = &pmic_arb_v5;
1208 pmic_arb->rd_base = devm_ioremap_resource(&ctrl->dev, res);
1209 if (IS_ERR(pmic_arb->rd_base)) {
1210 err = PTR_ERR(pmic_arb->rd_base);
1216 pmic_arb->wr_base = devm_ioremap_resource(&ctrl->dev, res);
1217 if (IS_ERR(pmic_arb->wr_base)) {
1218 err = PTR_ERR(pmic_arb->wr_base);
1224 pmic_arb->ver_ops->ver_str, hw_ver);
1227 pmic_arb->intr = devm_ioremap_resource(&ctrl->dev, res);
1228 if (IS_ERR(pmic_arb->intr)) {
1229 err = PTR_ERR(pmic_arb->intr);
1234 pmic_arb->cnfg = devm_ioremap_resource(&ctrl->dev, res);
1235 if (IS_ERR(pmic_arb->cnfg)) {
1236 err = PTR_ERR(pmic_arb->cnfg);
1240 pmic_arb->irq = platform_get_irq_byname(pdev, "periph_irq");
1241 if (pmic_arb->irq < 0) {
1242 err = pmic_arb->irq;
1259 pmic_arb->channel = channel;
1273 pmic_arb->ee = ee;
1281 pmic_arb->mapping_table = mapping_table;
1284 pmic_arb->max_apid = 0;
1285 pmic_arb->min_apid = PMIC_ARB_MAX_PERIPHS - 1;
1288 raw_spin_lock_init(&pmic_arb->lock);
1295 err = pmic_arb_read_apid_map_v5(pmic_arb);
1304 pmic_arb->domain = irq_domain_add_tree(pdev->dev.of_node,
1305 &pmic_arb_irq_domain_ops, pmic_arb);
1306 if (!pmic_arb->domain) {
1312 irq_set_chained_handler_and_data(pmic_arb->irq, pmic_arb_chained_irq,
1313 pmic_arb);
1321 irq_set_chained_handler_and_data(pmic_arb->irq, NULL, NULL);
1322 irq_domain_remove(pmic_arb->domain);
1331 struct spmi_pmic_arb *pmic_arb = spmi_controller_get_drvdata(ctrl);
1333 irq_set_chained_handler_and_data(pmic_arb->irq, NULL, NULL);
1334 irq_domain_remove(pmic_arb->domain);