Lines Matching refs:xspi
116 static void xilinx_spi_tx(struct xilinx_spi *xspi)
120 if (!xspi->tx_ptr) {
121 xspi->write_fn(0, xspi->regs + XSPI_TXD_OFFSET);
125 switch (xspi->bytes_per_word) {
127 data = *(u8 *)(xspi->tx_ptr);
130 data = *(u16 *)(xspi->tx_ptr);
133 data = *(u32 *)(xspi->tx_ptr);
137 xspi->write_fn(data, xspi->regs + XSPI_TXD_OFFSET);
138 xspi->tx_ptr += xspi->bytes_per_word;
141 static void xilinx_spi_rx(struct xilinx_spi *xspi)
143 u32 data = xspi->read_fn(xspi->regs + XSPI_RXD_OFFSET);
145 if (!xspi->rx_ptr)
148 switch (xspi->bytes_per_word) {
150 *(u8 *)(xspi->rx_ptr) = data;
153 *(u16 *)(xspi->rx_ptr) = data;
156 *(u32 *)(xspi->rx_ptr) = data;
160 xspi->rx_ptr += xspi->bytes_per_word;
163 static void xspi_init_hw(struct xilinx_spi *xspi)
165 void __iomem *regs_base = xspi->regs;
168 xspi->write_fn(XIPIF_V123B_RESET_MASK,
173 xspi->write_fn(XSPI_INTR_TX_EMPTY,
176 xspi->write_fn(0, regs_base + XIPIF_V123B_DGIER_OFFSET);
178 xspi->write_fn(0xffff, regs_base + XSPI_SSR_OFFSET);
181 xspi->write_fn(XSPI_CR_MANUAL_SSELECT | XSPI_CR_MASTER_MODE |
188 struct xilinx_spi *xspi = spi_master_get_devdata(spi->master);
194 xspi->write_fn(xspi->cs_inactive, xspi->regs + XSPI_SSR_OFFSET);
199 cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET) & ~XSPI_CR_MODE_MASK;
208 xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET);
215 cs = xspi->cs_inactive;
219 xspi->write_fn(cs, xspi->regs + XSPI_SSR_OFFSET);
228 struct xilinx_spi *xspi = spi_master_get_devdata(spi->master);
231 xspi->cs_inactive &= ~BIT(spi->chip_select);
233 xspi->cs_inactive |= BIT(spi->chip_select);
240 struct xilinx_spi *xspi = spi_master_get_devdata(spi->master);
247 xspi->tx_ptr = t->tx_buf;
248 xspi->rx_ptr = t->rx_buf;
249 remaining_words = t->len / xspi->bytes_per_word;
251 if (xspi->irq >= 0 && remaining_words > xspi->buffer_size) {
255 cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET);
256 xspi->write_fn(cr | XSPI_CR_TRANS_INHIBIT,
257 xspi->regs + XSPI_CR_OFFSET);
259 isr = xspi->read_fn(xspi->regs + XIPIF_V123B_IISR_OFFSET);
261 xspi->write_fn(isr,
262 xspi->regs + XIPIF_V123B_IISR_OFFSET);
264 xspi->write_fn(XIPIF_V123B_GINTR_ENABLE,
265 xspi->regs + XIPIF_V123B_DGIER_OFFSET);
266 reinit_completion(&xspi->done);
274 n_words = min(remaining_words, xspi->buffer_size);
278 xilinx_spi_tx(xspi);
285 xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET);
286 wait_for_completion(&xspi->done);
293 xspi->write_fn(cr | XSPI_CR_TRANS_INHIBIT,
294 xspi->regs + XSPI_CR_OFFSET);
297 sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET);
308 xspi_init_hw(xspi);
313 xilinx_spi_rx(xspi);
318 sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET);
320 xilinx_spi_rx(xspi);
329 xspi->write_fn(0, xspi->regs + XIPIF_V123B_DGIER_OFFSET);
330 xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET);
344 struct xilinx_spi *xspi = dev_id;
348 ipif_isr = xspi->read_fn(xspi->regs + XIPIF_V123B_IISR_OFFSET);
349 xspi->write_fn(ipif_isr, xspi->regs + XIPIF_V123B_IISR_OFFSET);
352 complete(&xspi->done);
359 static int xilinx_spi_find_buffer_size(struct xilinx_spi *xspi)
368 xspi->write_fn(XIPIF_V123B_RESET_MASK,
369 xspi->regs + XIPIF_V123B_RESETR_OFFSET);
373 xspi->write_fn(0, xspi->regs + XSPI_TXD_OFFSET);
374 sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET);
391 struct xilinx_spi *xspi;
432 xspi = spi_master_get_devdata(master);
433 xspi->cs_inactive = 0xffffffff;
434 xspi->bitbang.master = master;
435 xspi->bitbang.chipselect = xilinx_spi_chipselect;
436 xspi->bitbang.setup_transfer = xilinx_spi_setup_transfer;
437 xspi->bitbang.txrx_bufs = xilinx_spi_txrx_bufs;
438 init_completion(&xspi->done);
441 xspi->regs = devm_ioremap_resource(&pdev->dev, res);
442 if (IS_ERR(xspi->regs)) {
443 ret = PTR_ERR(xspi->regs);
458 xspi->read_fn = xspi_read32;
459 xspi->write_fn = xspi_write32;
461 xspi->write_fn(XSPI_CR_LOOP, xspi->regs + XSPI_CR_OFFSET);
462 tmp = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET);
465 xspi->read_fn = xspi_read32_be;
466 xspi->write_fn = xspi_write32_be;
470 xspi->bytes_per_word = bits_per_word / 8;
471 xspi->buffer_size = xilinx_spi_find_buffer_size(xspi);
473 xspi->irq = platform_get_irq(pdev, 0);
474 if (xspi->irq < 0 && xspi->irq != -ENXIO) {
475 ret = xspi->irq;
477 } else if (xspi->irq >= 0) {
479 ret = devm_request_irq(&pdev->dev, xspi->irq, xilinx_spi_irq, 0,
480 dev_name(&pdev->dev), xspi);
486 xspi_init_hw(xspi);
488 ret = spi_bitbang_start(&xspi->bitbang);
494 dev_info(&pdev->dev, "at %pR, irq=%d\n", res, xspi->irq);
513 struct xilinx_spi *xspi = spi_master_get_devdata(master);
514 void __iomem *regs_base = xspi->regs;
516 spi_bitbang_stop(&xspi->bitbang);
519 xspi->write_fn(0, regs_base + XIPIF_V123B_IIER_OFFSET);
521 xspi->write_fn(0, regs_base + XIPIF_V123B_DGIER_OFFSET);
523 spi_master_put(xspi->bitbang.master);