Lines Matching refs:PCH_SPCR
23 #define PCH_SPCR 0x00 /* SPI control register */
249 pch_spi_setclr_reg(master, PCH_SPCR, SPCR_MSTR_BIT, 0);
258 pch_spi_setclr_reg(master, PCH_SPCR, SPCR_FICLR_BIT, 0);
259 pch_spi_setclr_reg(master, PCH_SPCR, 0, SPCR_FICLR_BIT);
296 reg_spcr_val = ioread32(io_remap_addr + PCH_SPCR);
303 iowrite32(reg_spcr_val, (io_remap_addr + PCH_SPCR));
314 pch_spi_setclr_reg(data->master, PCH_SPCR, 0,
435 pch_spi_setclr_reg(spi->master, PCH_SPCR, flags,
693 pch_spi_setclr_reg(data->master, PCH_SPCR,
700 pch_spi_setclr_reg(data->master, PCH_SPCR,
717 pch_spi_setclr_reg(data->master, PCH_SPCR, 0, PCH_ALL | SPCR_SPE_BIT);
781 pch_spi_setclr_reg(data->master, PCH_SPCR, SPCR_SPE_BIT, PCH_ALL);
811 pch_spi_setclr_reg(data->master, PCH_SPCR, 0,
999 pch_spi_setclr_reg(data->master, PCH_SPCR,
1450 pch_spi_setclr_reg(data->master, PCH_SPCR, 0, PCH_ALL);
1488 pch_spi_setclr_reg(data->master, PCH_SPCR, 0, PCH_ALL);