Lines Matching defs:tegra_spi_writel
233 static inline void tegra_spi_writel(struct tegra_spi_data *tspi,
249 tegra_spi_writel(tspi, val, SPI_TRANS_STATUS);
254 tegra_spi_writel(tspi, SPI_ERR | SPI_FIFO_ERROR,
317 tegra_spi_writel(tspi, x, SPI_TX_FIFO);
335 tegra_spi_writel(tspi, x, SPI_TX_FIFO);
519 tegra_spi_writel(tspi, status, SPI_FIFO_STATUS);
545 tegra_spi_writel(tspi, val, SPI_DMA_BLK);
573 tegra_spi_writel(tspi, val, SPI_DMA_CTL);
625 tegra_spi_writel(tspi, val, SPI_DMA_CTL);
641 tegra_spi_writel(tspi, val, SPI_DMA_BLK);
650 tegra_spi_writel(tspi, val, SPI_DMA_CTL);
657 tegra_spi_writel(tspi, val, SPI_COMMAND1);
754 tegra_spi_writel(tspi, spi_cs_timing, SPI_CS_TIMING1);
769 tegra_spi_writel(tspi, spi_cs_timing, SPI_CS_TIMING2);
828 tegra_spi_writel(tspi, command1, SPI_COMMAND1);
831 tegra_spi_writel(tspi, command1, SPI_COMMAND1);
857 tegra_spi_writel(tspi, command2, SPI_COMMAND2);
900 tegra_spi_writel(tspi, command1, SPI_COMMAND1);
979 tegra_spi_writel(tspi, val, SPI_INTR_MASK);
993 tegra_spi_writel(tspi, tspi->def_command1_reg, SPI_COMMAND1);
1014 tegra_spi_writel(tspi, tspi->command1_reg, SPI_COMMAND1);
1017 tegra_spi_writel(tspi, tspi->def_command1_reg, SPI_COMMAND1);
1409 tegra_spi_writel(tspi, tspi->def_command1_reg, SPI_COMMAND1);
1486 tegra_spi_writel(tspi, tspi->command1_reg, SPI_COMMAND1);
1487 tegra_spi_writel(tspi, tspi->def_command2_reg, SPI_COMMAND2);