Lines Matching refs:base
268 * @base: virtual memory area
288 * @phys_addr: SPI registers physical base address
294 void __iomem *base;
356 writel_relaxed(readl_relaxed(spi->base + offset) | bits,
357 spi->base + offset);
363 writel_relaxed(readl_relaxed(spi->base + offset) & ~bits,
364 spi->base + offset);
380 while (readl_relaxed(spi->base + STM32H7_SPI_SR) & STM32H7_SPI_SR_TXP)
381 writeb_relaxed(++count, spi->base + STM32H7_SPI_TXDR);
419 cfg1 = readl_relaxed(spi->base + STM32H7_SPI_CFG1);
515 if ((spi->tx_len > 0) && (readl_relaxed(spi->base + STM32F4_SPI_SR) &
522 writew_relaxed(*tx_buf16, spi->base + STM32F4_SPI_DR);
527 writeb_relaxed(*tx_buf8, spi->base + STM32F4_SPI_DR);
545 (readl_relaxed(spi->base + STM32H7_SPI_SR) &
552 writel_relaxed(*tx_buf32, spi->base + STM32H7_SPI_TXDR);
557 writew_relaxed(*tx_buf16, spi->base + STM32H7_SPI_TXDR);
562 writeb_relaxed(*tx_buf8, spi->base + STM32H7_SPI_TXDR);
579 if ((spi->rx_len > 0) && (readl_relaxed(spi->base + STM32F4_SPI_SR) &
586 *rx_buf16 = readw_relaxed(spi->base + STM32F4_SPI_DR);
591 *rx_buf8 = readb_relaxed(spi->base + STM32F4_SPI_DR);
609 u32 sr = readl_relaxed(spi->base + STM32H7_SPI_SR);
622 *rx_buf32 = readl_relaxed(spi->base + STM32H7_SPI_RXDR);
628 *rx_buf16 = readw_relaxed(spi->base + STM32H7_SPI_RXDR);
633 *rx_buf8 = readb_relaxed(spi->base + STM32H7_SPI_RXDR);
637 sr = readl_relaxed(spi->base + STM32H7_SPI_SR);
671 if (!(readl_relaxed(spi->base + STM32F4_SPI_CR1) &
683 if (readl_relaxed_poll_timeout_atomic(spi->base + STM32F4_SPI_SR,
700 readl_relaxed(spi->base + STM32F4_SPI_DR);
701 readl_relaxed(spi->base + STM32F4_SPI_SR);
727 cr1 = readl_relaxed(spi->base + STM32H7_SPI_CR1);
735 if (readl_relaxed_poll_timeout_atomic(spi->base + STM32H7_SPI_SR,
740 spi->base + STM32H7_SPI_CR1);
742 spi->base + STM32H7_SPI_SR,
764 writel_relaxed(0, spi->base + STM32H7_SPI_IER);
765 writel_relaxed(STM32H7_SPI_IFCR_ALL, spi->base + STM32H7_SPI_IFCR);
811 sr = readl_relaxed(spi->base + STM32F4_SPI_SR);
843 readl_relaxed(spi->base + STM32F4_SPI_DR);
844 readl_relaxed(spi->base + STM32F4_SPI_SR);
916 sr = readl_relaxed(spi->base + STM32H7_SPI_SR);
917 ier = readl_relaxed(spi->base + STM32H7_SPI_IER);
981 writel_relaxed(sr & mask, spi->base + STM32H7_SPI_IFCR);
1038 (readl_relaxed(spi->base + spi->cfg->regs->cpol.reg) &
1040 spi->base + spi->cfg->regs->cpol.reg);
1092 sr = readl_relaxed(spi->base + STM32H7_SPI_SR);
1230 writel_relaxed(ier, spi->base + STM32H7_SPI_IER);
1416 (readl_relaxed(spi->base + STM32H7_SPI_CFG1) &
1418 spi->base + STM32H7_SPI_CFG1);
1434 writel_relaxed((readl_relaxed(spi->base + spi->cfg->regs->br.reg) &
1436 spi->base + spi->cfg->regs->br.reg);
1527 (readl_relaxed(spi->base + STM32H7_SPI_CFG2) &
1529 spi->base + STM32H7_SPI_CFG2);
1557 writel_relaxed((readl_relaxed(spi->base + STM32H7_SPI_CFG2) &
1559 spi->base + STM32H7_SPI_CFG2);
1575 writel_relaxed((readl_relaxed(spi->base + STM32H7_SPI_CR2) &
1577 spi->base + STM32H7_SPI_CR2);
1854 spi->base = devm_ioremap_resource(&pdev->dev, res);
1855 if (IS_ERR(spi->base))
1856 return PTR_ERR(spi->base);