Lines Matching refs:master

389 static int spi_qup_prep_sg(struct spi_master *master, struct scatterlist *sgl,
393 struct spi_qup *qup = spi_master_get_devdata(master);
400 chan = master->dma_tx;
402 chan = master->dma_rx;
416 static void spi_qup_dma_terminate(struct spi_master *master,
420 dmaengine_terminate_all(master->dma_tx);
422 dmaengine_terminate_all(master->dma_rx);
449 struct spi_master *master = spi->master;
450 struct spi_qup *qup = spi_master_get_devdata(master);
485 ret = spi_qup_prep_sg(master, rx_sgl, rx_nents,
489 dma_async_issue_pending(master->dma_rx);
493 ret = spi_qup_prep_sg(master, tx_sgl, tx_nents,
498 dma_async_issue_pending(master->dma_tx);
517 struct spi_master *master = spi->master;
518 struct spi_qup *qup = spi_master_get_devdata(master);
663 struct spi_qup *controller = spi_master_get_devdata(spi->master);
684 else if (spi->master->can_dma &&
685 spi->master->can_dma(spi->master, spi, xfer) &&
686 spi->master->cur_msg_mapped)
697 struct spi_qup *controller = spi_master_get_devdata(spi->master);
845 static int spi_qup_transfer_one(struct spi_master *master,
849 struct spi_qup *controller = spi_master_get_devdata(master);
883 spi_qup_dma_terminate(master, xfer);
888 static bool spi_qup_can_dma(struct spi_master *master, struct spi_device *spi,
891 struct spi_qup *qup = spi_master_get_devdata(master);
897 IS_ERR_OR_NULL(master->dma_rx))
905 IS_ERR_OR_NULL(master->dma_tx))
918 static void spi_qup_release_dma(struct spi_master *master)
920 if (!IS_ERR_OR_NULL(master->dma_rx))
921 dma_release_channel(master->dma_rx);
922 if (!IS_ERR_OR_NULL(master->dma_tx))
923 dma_release_channel(master->dma_tx);
926 static int spi_qup_init_dma(struct spi_master *master, resource_size_t base)
928 struct spi_qup *spi = spi_master_get_devdata(master);
935 master->dma_rx = dma_request_chan(dev, "rx");
936 if (IS_ERR(master->dma_rx))
937 return PTR_ERR(master->dma_rx);
939 master->dma_tx = dma_request_chan(dev, "tx");
940 if (IS_ERR(master->dma_tx)) {
941 ret = PTR_ERR(master->dma_tx);
956 ret = dmaengine_slave_config(master->dma_rx, rx_conf);
962 ret = dmaengine_slave_config(master->dma_tx, tx_conf);
971 dma_release_channel(master->dma_tx);
973 dma_release_channel(master->dma_rx);
983 controller = spi_master_get_devdata(spi->master);
997 struct spi_master *master;
1033 master = spi_alloc_master(dev, sizeof(struct spi_qup));
1034 if (!master) {
1035 dev_err(dev, "cannot allocate master\n");
1042 master->num_chipselect = SPI_NUM_CHIPSELECTS;
1044 master->num_chipselect = num_cs;
1046 master->bus_num = pdev->id;
1047 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP;
1048 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
1049 master->max_speed_hz = max_freq;
1050 master->transfer_one = spi_qup_transfer_one;
1051 master->dev.of_node = pdev->dev.of_node;
1052 master->auto_runtime_pm = true;
1053 master->dma_alignment = dma_get_cache_alignment();
1054 master->max_dma_len = SPI_MAX_XFER;
1056 platform_set_drvdata(pdev, master);
1058 controller = spi_master_get_devdata(master);
1066 ret = spi_qup_init_dma(master, res->start);
1070 master->can_dma = spi_qup_can_dma;
1075 master->set_cs = spi_qup_set_cs;
1153 ret = devm_spi_register_master(dev, master);
1165 spi_qup_release_dma(master);
1167 spi_master_put(master);
1174 struct spi_master *master = dev_get_drvdata(device);
1175 struct spi_qup *controller = spi_master_get_devdata(master);
1191 struct spi_master *master = dev_get_drvdata(device);
1192 struct spi_qup *controller = spi_master_get_devdata(master);
1217 struct spi_master *master = dev_get_drvdata(device);
1218 struct spi_qup *controller = spi_master_get_devdata(master);
1226 ret = spi_master_suspend(master);
1241 struct spi_master *master = dev_get_drvdata(device);
1242 struct spi_qup *controller = spi_master_get_devdata(master);
1259 ret = spi_master_resume(master);
1274 struct spi_master *master = dev_get_drvdata(&pdev->dev);
1275 struct spi_qup *controller = spi_master_get_devdata(master);
1293 spi_qup_release_dma(master);