Lines Matching defs:drv_data
20 static void pxa2xx_spi_dma_transfer_complete(struct driver_data *drv_data,
23 struct spi_message *msg = drv_data->controller->cur_msg;
31 if (atomic_dec_and_test(&drv_data->dma_running)) {
38 u32 status = pxa2xx_spi_read(drv_data, SSSR)
39 & drv_data->mask_sr;
44 pxa2xx_spi_write(drv_data, SSCR1,
45 pxa2xx_spi_read(drv_data, SSCR1)
46 & ~drv_data->dma_cr1);
47 write_SSSR_CS(drv_data, drv_data->clear_sr);
48 if (!pxa25x_ssp_comp(drv_data))
49 pxa2xx_spi_write(drv_data, SSTO, 0);
53 pxa2xx_spi_write(drv_data, SSCR0,
54 pxa2xx_spi_read(drv_data, SSCR0)
59 spi_finalize_current_transfer(drv_data->controller);
69 pxa2xx_spi_dma_prepare_one(struct driver_data *drv_data,
74 spi_get_ctldata(drv_data->controller->cur_msg->spi);
81 switch (drv_data->n_bytes) {
97 cfg.dst_addr = drv_data->ssdr_physical;
102 chan = drv_data->controller->dma_tx;
104 cfg.src_addr = drv_data->ssdr_physical;
109 chan = drv_data->controller->dma_rx;
114 dev_warn(&drv_data->pdev->dev, "DMA slave config failed\n");
122 irqreturn_t pxa2xx_spi_dma_transfer(struct driver_data *drv_data)
126 status = pxa2xx_spi_read(drv_data, SSSR) & drv_data->mask_sr;
128 dev_err(&drv_data->pdev->dev, "FIFO overrun\n");
130 dmaengine_terminate_async(drv_data->controller->dma_rx);
131 dmaengine_terminate_async(drv_data->controller->dma_tx);
133 pxa2xx_spi_dma_transfer_complete(drv_data, true);
140 int pxa2xx_spi_dma_prepare(struct driver_data *drv_data,
146 tx_desc = pxa2xx_spi_dma_prepare_one(drv_data, DMA_MEM_TO_DEV, xfer);
148 dev_err(&drv_data->pdev->dev,
154 rx_desc = pxa2xx_spi_dma_prepare_one(drv_data, DMA_DEV_TO_MEM, xfer);
156 dev_err(&drv_data->pdev->dev,
164 rx_desc->callback_param = drv_data;
171 dmaengine_terminate_async(drv_data->controller->dma_tx);
176 void pxa2xx_spi_dma_start(struct driver_data *drv_data)
178 dma_async_issue_pending(drv_data->controller->dma_rx);
179 dma_async_issue_pending(drv_data->controller->dma_tx);
181 atomic_set(&drv_data->dma_running, 1);
184 void pxa2xx_spi_dma_stop(struct driver_data *drv_data)
186 atomic_set(&drv_data->dma_running, 0);
187 dmaengine_terminate_sync(drv_data->controller->dma_rx);
188 dmaengine_terminate_sync(drv_data->controller->dma_tx);
191 int pxa2xx_spi_dma_setup(struct driver_data *drv_data)
193 struct pxa2xx_spi_controller *pdata = drv_data->controller_info;
194 struct device *dev = &drv_data->pdev->dev;
195 struct spi_controller *controller = drv_data->controller;
217 void pxa2xx_spi_dma_release(struct driver_data *drv_data)
219 struct spi_controller *controller = drv_data->controller;
239 struct driver_data *drv_data = spi_controller_get_devdata(spi->controller);
240 u32 dma_burst_size = drv_data->controller_info->dma_burst_size;