Lines Matching defs:cpsdvsr
1738 static inline u32 spi_rate(u32 rate, u16 cpsdvsr, u16 scr)
1740 return rate / (cpsdvsr * (1 + scr));
1747 u16 cpsdvsr = CPSDVR_MIN, scr = SCR_MIN;
1754 /* cpsdvsr = 254 & scr = 255 */
1771 * freq) for all values of scr & cpsdvsr.
1773 while ((cpsdvsr <= CPSDVR_MAX) && !found) {
1775 tmp = spi_rate(rate, cpsdvsr, scr);
1789 best_cpsdvsr = cpsdvsr;
1801 cpsdvsr += 2;
1805 WARN(!best_freq, "pl022: Matching cpsdvsr and scr not found for %d Hz rate \n",
1808 clk_freq->cpsdvsr = (u8) (best_cpsdvsr & 0xFF);
1813 dev_dbg(&pl022->adev->dev, "SSP cpsdvsr = %d, scr = %d\n",
1814 clk_freq->cpsdvsr, clk_freq->scr);
1853 struct ssp_clock_params clk_freq = { .cpsdvsr = 0, .scr = 0};
1912 if ((0 == chip_info->clk_freq.cpsdvsr)
1921 if ((clk_freq.cpsdvsr % 2) != 0)
1922 clk_freq.cpsdvsr =
1923 clk_freq.cpsdvsr - 1;
1925 if ((clk_freq.cpsdvsr < CPSDVR_MIN)
1926 || (clk_freq.cpsdvsr > CPSDVR_MAX)) {
1929 "cpsdvsr is configured incorrectly\n");
1998 chip->cpsr = clk_freq.cpsdvsr;