Lines Matching defs:bits
102 * The ST version of this block moves som bits
103 * in SSP_CR0 and extends it to 32 bits
119 * The ST version of this block adds some bits
315 * @max_bpw: maximum number of bits per word
407 * register is 32 bits wide rather than just 16
613 /* ST versions extend this register to use all 16 bits */
680 * FIFO, means only 8x8 = 64 bits in FIFO) at least.
1856 unsigned int bits = spi->bits_per_word;
1952 /* Check bits per word with vendor specific range */
1953 if ((bits <= 3) || (bits > pl022->vendor->max_bpw)) {
1959 } else if (bits <= 8) {
1960 dev_dbg(&spi->dev, "4 <= n <=8 bits per word\n");
1964 } else if (bits <= 16) {
1965 dev_dbg(&spi->dev, "9 <= n <= 16 bits per word\n");
1970 dev_dbg(&spi->dev, "17 <= n <= 32 bits per word\n");
2005 /* These bits are only in the PL023 */
2009 /* These bits are in the PL022 but not PL023 */
2019 SSP_WRITE_BITS(chip->cr0, bits - 1,
2036 SSP_WRITE_BITS(chip->cr0, bits - 1,