Lines Matching refs:master
58 #define CTRL_MSTEN BIT(5) /* enable master mode */
103 struct spi_master *master;
227 dev_err(&pic32s->master->dev, "%s\n", msg);
228 if (pic32s->master->cur_msg)
229 pic32s->master->cur_msg->status = -EIO;
253 if (!pic32s->master->cur_msg) {
303 struct spi_master *master = pic32s->master;
309 if (!master->dma_rx || !master->dma_tx)
312 desc_rx = dmaengine_prep_slave_sg(master->dma_rx,
322 desc_tx = dmaengine_prep_slave_sg(master->dma_tx,
346 dma_async_issue_pending(master->dma_rx);
347 dma_async_issue_pending(master->dma_tx);
352 dmaengine_terminate_all(master->dma_rx);
360 struct spi_master *master = pic32s->master;
375 ret = dmaengine_slave_config(master->dma_tx, &cfg);
377 dev_err(&master->dev, "tx channel setup failed\n");
383 ret = dmaengine_slave_config(master->dma_rx, &cfg);
385 dev_err(&master->dev, "rx channel setup failed\n");
435 static int pic32_spi_prepare_hardware(struct spi_master *master)
437 struct pic32_spi *pic32s = spi_master_get_devdata(master);
444 static int pic32_spi_prepare_message(struct spi_master *master,
447 struct pic32_spi *pic32s = spi_master_get_devdata(master);
486 static bool pic32_spi_can_dma(struct spi_master *master,
490 struct pic32_spi *pic32s = spi_master_get_devdata(master);
497 static int pic32_spi_one_transfer(struct spi_master *master,
506 pic32s = spi_master_get_devdata(master);
554 dmaengine_terminate_all(master->dma_rx);
555 dmaengine_terminate_all(master->dma_tx);
565 static int pic32_spi_unprepare_message(struct spi_master *master,
572 static int pic32_spi_unprepare_hardware(struct spi_master *master)
574 struct pic32_spi *pic32s = spi_master_get_devdata(master);
612 struct spi_master *master = pic32s->master;
615 master->dma_rx = dma_request_chan(dev, "spi-rx");
616 if (IS_ERR(master->dma_rx)) {
617 if (PTR_ERR(master->dma_rx) == -EPROBE_DEFER)
622 master->dma_rx = NULL;
626 master->dma_tx = dma_request_chan(dev, "spi-tx");
627 if (IS_ERR(master->dma_tx)) {
628 if (PTR_ERR(master->dma_tx) == -EPROBE_DEFER)
633 master->dma_tx = NULL;
646 if (master->dma_rx) {
647 dma_release_channel(master->dma_rx);
648 master->dma_rx = NULL;
651 if (master->dma_tx) {
652 dma_release_channel(master->dma_tx);
653 master->dma_tx = NULL;
665 if (pic32s->master->dma_rx)
666 dma_release_channel(pic32s->master->dma_rx);
668 if (pic32s->master->dma_tx)
669 dma_release_channel(pic32s->master->dma_tx);
687 /* enable master mode while disabled */
760 struct spi_master *master;
764 master = spi_alloc_master(&pdev->dev, sizeof(*pic32s));
765 if (!master)
768 pic32s = spi_master_get_devdata(master);
769 pic32s->master = master;
775 master->dev.of_node = pdev->dev.of_node;
776 master->mode_bits = SPI_MODE_3 | SPI_MODE_0 | SPI_CS_HIGH;
777 master->num_chipselect = 1; /* single chip-select */
778 master->max_speed_hz = clk_get_rate(pic32s->clk);
779 master->setup = pic32_spi_setup;
780 master->cleanup = pic32_spi_cleanup;
781 master->flags = SPI_MASTER_MUST_TX | SPI_MASTER_MUST_RX;
782 master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16) |
784 master->transfer_one = pic32_spi_one_transfer;
785 master->prepare_message = pic32_spi_prepare_message;
786 master->unprepare_message = pic32_spi_unprepare_message;
787 master->prepare_transfer_hardware = pic32_spi_prepare_hardware;
788 master->unprepare_transfer_hardware = pic32_spi_unprepare_hardware;
796 master->can_dma = pic32_spi_can_dma;
831 /* register master */
832 ret = devm_spi_register_master(&pdev->dev, master);
834 dev_err(&master->dev, "failed registering spi master\n");
846 spi_master_put(master);