Lines Matching refs:master
120 struct spi_master *master;
144 static inline void mcspi_write_reg(struct spi_master *master,
147 struct omap2_mcspi *mcspi = spi_master_get_devdata(master);
152 static inline u32 mcspi_read_reg(struct spi_master *master, int idx)
154 struct omap2_mcspi *mcspi = spi_master_get_devdata(master);
238 struct omap2_mcspi *mcspi = spi_master_get_devdata(spi->master);
270 static void omap2_mcspi_set_mode(struct spi_master *master)
272 struct omap2_mcspi *mcspi = spi_master_get_devdata(master);
277 * Choose master or slave mode
279 l = mcspi_read_reg(master, OMAP2_MCSPI_MODULCTRL);
281 if (spi_controller_is_slave(master)) {
287 mcspi_write_reg(master, OMAP2_MCSPI_MODULCTRL, l);
295 struct spi_master *master = spi->master;
302 mcspi = spi_master_get_devdata(master);
330 mcspi_write_reg(master, OMAP2_MCSPI_XFERLEVEL, xferlevel);
368 if (spi_controller_is_slave(mcspi->master)) {
382 struct omap2_mcspi *mcspi = spi_master_get_devdata(spi->master);
394 struct omap2_mcspi *mcspi = spi_master_get_devdata(spi->master);
411 mcspi = spi_master_get_devdata(spi->master);
449 mcspi = spi_master_get_devdata(spi->master);
455 * it mentions reducing DMA transfer length by one element in master
594 mcspi = spi_master_get_devdata(spi->master);
627 if (spi_controller_is_slave(spi->master))
628 mcspi_write_reg(spi->master,
647 if (spi_controller_is_slave(mcspi->master)) {
660 mcspi_write_reg(mcspi->master, OMAP2_MCSPI_IRQSTATUS,
899 mcspi = spi_master_get_devdata(spi->master);
924 /* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS
1015 static void omap2_mcspi_release_dma(struct spi_master *master)
1017 struct omap2_mcspi *mcspi = spi_master_get_devdata(master);
1021 for (i = 0; i < master->num_chipselect; i++) {
1052 struct omap2_mcspi *mcspi = spi_master_get_devdata(spi->master);
1095 irqstat = mcspi_read_reg(mcspi->master, OMAP2_MCSPI_IRQSTATUS);
1100 mcspi_write_reg(mcspi->master, OMAP2_MCSPI_IRQENABLE, 0);
1107 static int omap2_mcspi_slave_abort(struct spi_master *master)
1109 struct omap2_mcspi *mcspi = spi_master_get_devdata(master);
1120 static int omap2_mcspi_transfer_one(struct spi_master *master,
1128 * channel" master mode. As a side effect, we need to manage the
1140 mcspi = spi_master_get_devdata(master);
1174 mcspi_write_reg(master, OMAP2_MCSPI_MODULCTRL, chconf);
1200 master->cur_msg_mapped &&
1201 master->can_dma(master, spi, t))
1212 master->cur_msg_mapped &&
1213 master->can_dma(master, spi, t))
1239 mcspi_write_reg(master, OMAP2_MCSPI_MODULCTRL, chconf);
1255 static int omap2_mcspi_prepare_message(struct spi_master *master,
1258 struct omap2_mcspi *mcspi = spi_master_get_devdata(master);
1282 static bool omap2_mcspi_can_dma(struct spi_master *master,
1286 struct omap2_mcspi *mcspi = spi_master_get_devdata(spi->master);
1293 if (spi_controller_is_slave(master))
1296 master->dma_rx = mcspi_dma->dma_rx;
1297 master->dma_tx = mcspi_dma->dma_tx;
1304 struct omap2_mcspi *mcspi = spi_master_get_devdata(spi->master);
1316 struct spi_master *master = mcspi->master;
1327 mcspi_write_reg(master, OMAP2_MCSPI_WAKEUPENABLE,
1331 omap2_mcspi_set_mode(master);
1344 struct spi_master *master = dev_get_drvdata(dev);
1345 struct omap2_mcspi *mcspi = spi_master_get_devdata(master);
1350 mcspi_write_reg(master, OMAP2_MCSPI_MODULCTRL, ctx->modulctrl);
1351 mcspi_write_reg(master, OMAP2_MCSPI_WAKEUPENABLE, ctx->wakeupenable);
1406 struct spi_master *master;
1416 master = spi_alloc_slave(&pdev->dev, sizeof(*mcspi));
1418 master = spi_alloc_master(&pdev->dev, sizeof(*mcspi));
1419 if (!master)
1423 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
1424 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
1425 master->setup = omap2_mcspi_setup;
1426 master->auto_runtime_pm = true;
1427 master->prepare_message = omap2_mcspi_prepare_message;
1428 master->can_dma = omap2_mcspi_can_dma;
1429 master->transfer_one = omap2_mcspi_transfer_one;
1430 master->set_cs = omap2_mcspi_set_cs;
1431 master->cleanup = omap2_mcspi_cleanup;
1432 master->slave_abort = omap2_mcspi_slave_abort;
1433 master->dev.of_node = node;
1434 master->max_speed_hz = OMAP2_MCSPI_MAX_FREQ;
1435 master->min_speed_hz = OMAP2_MCSPI_MAX_FREQ >> 15;
1436 master->use_gpio_descriptors = true;
1438 platform_set_drvdata(pdev, master);
1440 mcspi = spi_master_get_devdata(master);
1441 mcspi->master = master;
1449 master->num_chipselect = num_cs;
1454 master->num_chipselect = pdata->num_cs;
1460 master->max_transfer_size = omap2_mcspi_max_xfer_size;
1476 mcspi->dma_channels = devm_kcalloc(&pdev->dev, master->num_chipselect,
1484 for (i = 0; i < master->num_chipselect; i++) {
1518 status = devm_spi_register_controller(&pdev->dev, master);
1529 omap2_mcspi_release_dma(master);
1530 spi_master_put(master);
1536 struct spi_master *master = platform_get_drvdata(pdev);
1537 struct omap2_mcspi *mcspi = spi_master_get_devdata(master);
1539 omap2_mcspi_release_dma(master);
1553 struct spi_master *master = dev_get_drvdata(dev);
1554 struct omap2_mcspi *mcspi = spi_master_get_devdata(master);
1562 error = spi_master_suspend(master);
1564 dev_warn(mcspi->dev, "%s: master suspend failed: %i\n",
1572 struct spi_master *master = dev_get_drvdata(dev);
1573 struct omap2_mcspi *mcspi = spi_master_get_devdata(master);
1581 error = spi_master_resume(master);
1583 dev_warn(mcspi->dev, "%s: master resume failed: %i\n",