Lines Matching defs:lantiq_ssc_writel
193 static void lantiq_ssc_writel(const struct lantiq_ssc_spi *spi, u32 val,
235 lantiq_ssc_writel(spi, val, LTQ_SPI_RXFCON);
243 lantiq_ssc_writel(spi, val, LTQ_SPI_TXFCON);
258 lantiq_ssc_writel(spi, LTQ_SPI_WHBSTATE_CLREN, LTQ_SPI_WHBSTATE);
263 lantiq_ssc_writel(spi, LTQ_SPI_WHBSTATE_SETEN, LTQ_SPI_WHBSTATE);
292 lantiq_ssc_writel(spi, brt, LTQ_SPI_BRT);
352 lantiq_ssc_writel(spi, 1 << LTQ_SPI_CLC_RMC_S, LTQ_SPI_CLC);
361 lantiq_ssc_writel(spi, LTQ_SPI_CON_RUEN | LTQ_SPI_CON_AEN |
370 lantiq_ssc_writel(spi, LTQ_SPI_WHBSTATE_SETMS |
375 lantiq_ssc_writel(spi, 0, LTQ_SPI_GPOCON);
376 lantiq_ssc_writel(spi, 0xFF00, LTQ_SPI_FPGO);
383 lantiq_ssc_writel(spi, hwcfg->irnen_t | hwcfg->irnen_r |
460 lantiq_ssc_writel(spi, con, LTQ_SPI_CON);
512 lantiq_ssc_writel(spi, data, LTQ_SPI_TB);
620 lantiq_ssc_writel(spi, rxreq, LTQ_SPI_RXREQ);
631 lantiq_ssc_writel(spi, val, hwcfg->irncr);
676 lantiq_ssc_writel(spi, val, hwcfg->irncr);
807 lantiq_ssc_writel(spi, fgpo, LTQ_SPI_FPGO);
1030 lantiq_ssc_writel(spi, 0, LTQ_SPI_IRNEN);
1031 lantiq_ssc_writel(spi, 0, LTQ_SPI_CLC);