Lines Matching refs:ddata
86 #define ddata_to_dev(ddata) (&(ddata->bitbang.master->dev))
87 #define efm32_spi_vdbg(ddata, format, arg...) \
88 dev_vdbg(ddata_to_dev(ddata), format, ##arg)
90 static void efm32_spi_write32(struct efm32_spi_ddata *ddata,
93 writel_relaxed(value, ddata->base + offset);
96 static u32 efm32_spi_read32(struct efm32_spi_ddata *ddata, unsigned offset)
98 return readl_relaxed(ddata->base + offset);
104 struct efm32_spi_ddata *ddata = spi_master_get_devdata(spi->master);
108 unsigned long clkfreq = clk_get_rate(ddata->clk);
111 efm32_spi_write32(ddata, REG_CTRL_SYNC | REG_CTRL_MSBF |
115 efm32_spi_write32(ddata,
126 efm32_spi_write32(ddata, clkdiv, REG_CLKDIV);
127 efm32_spi_write32(ddata, REG_CMD_MASTEREN, REG_CMD);
128 efm32_spi_write32(ddata, REG_CMD_RXEN | REG_CMD_TXEN, REG_CMD);
133 static void efm32_spi_tx_u8(struct efm32_spi_ddata *ddata)
137 if (ddata->tx_buf) {
138 val = *ddata->tx_buf;
139 ddata->tx_buf++;
142 ddata->tx_len--;
143 efm32_spi_write32(ddata, val, REG_TXDATA);
144 efm32_spi_vdbg(ddata, "%s: tx 0x%x\n", __func__, val);
147 static void efm32_spi_rx_u8(struct efm32_spi_ddata *ddata)
149 u32 rxdata = efm32_spi_read32(ddata, REG_RXDATAX);
150 efm32_spi_vdbg(ddata, "%s: rx 0x%x\n", __func__, rxdata);
152 if (ddata->rx_buf) {
153 *ddata->rx_buf = rxdata;
154 ddata->rx_buf++;
157 ddata->rx_len--;
160 static void efm32_spi_filltx(struct efm32_spi_ddata *ddata)
162 while (ddata->tx_len &&
163 ddata->tx_len + 2 > ddata->rx_len &&
164 efm32_spi_read32(ddata, REG_STATUS) & REG_STATUS_TXBL) {
165 efm32_spi_tx_u8(ddata);
171 struct efm32_spi_ddata *ddata = spi_master_get_devdata(spi->master);
174 spin_lock_irq(&ddata->lock);
176 if (ddata->tx_buf || ddata->rx_buf)
179 ddata->tx_buf = t->tx_buf;
180 ddata->rx_buf = t->rx_buf;
181 ddata->tx_len = ddata->rx_len =
184 efm32_spi_filltx(ddata);
186 reinit_completion(&ddata->done);
188 efm32_spi_write32(ddata, REG_IF_TXBL | REG_IF_RXDATAV, REG_IEN);
190 spin_unlock_irq(&ddata->lock);
192 wait_for_completion(&ddata->done);
194 spin_lock_irq(&ddata->lock);
196 ret = t->len - max(ddata->tx_len, ddata->rx_len);
198 efm32_spi_write32(ddata, 0, REG_IEN);
199 ddata->tx_buf = ddata->rx_buf = NULL;
202 spin_unlock_irq(&ddata->lock);
209 struct efm32_spi_ddata *ddata = data;
212 spin_lock(&ddata->lock);
214 while (ddata->rx_len > 0 &&
215 efm32_spi_read32(ddata, REG_STATUS) &
217 efm32_spi_rx_u8(ddata);
222 if (!ddata->rx_len) {
223 u32 ien = efm32_spi_read32(ddata, REG_IEN);
227 efm32_spi_write32(ddata, ien, REG_IEN);
229 complete(&ddata->done);
232 spin_unlock(&ddata->lock);
239 struct efm32_spi_ddata *ddata = data;
241 efm32_spi_vdbg(ddata,
243 __func__, ddata->tx_len, ddata->rx_len,
244 efm32_spi_read32(ddata, REG_IF),
245 efm32_spi_read32(ddata, REG_STATUS));
247 spin_lock(&ddata->lock);
249 efm32_spi_filltx(ddata);
251 efm32_spi_vdbg(ddata, "%s: txlen = %u, rxlen = %u\n",
252 __func__, ddata->tx_len, ddata->rx_len);
254 if (!ddata->tx_len) {
255 u32 ien = efm32_spi_read32(ddata, REG_IEN);
259 efm32_spi_write32(ddata, ien, REG_IEN);
260 efm32_spi_vdbg(ddata, "disable TXBL\n");
263 spin_unlock(&ddata->lock);
268 static u32 efm32_spi_get_configured_location(struct efm32_spi_ddata *ddata)
270 u32 reg = efm32_spi_read32(ddata, REG_ROUTE);
276 struct spi_master *master, struct efm32_spi_ddata *ddata)
296 location = efm32_spi_get_configured_location(ddata);
301 ddata->pdata.location = location;
306 struct efm32_spi_ddata *ddata;
315 master = spi_alloc_master(&pdev->dev, sizeof(*ddata));
329 ddata = spi_master_get_devdata(master);
331 ddata->bitbang.master = master;
332 ddata->bitbang.setup_transfer = efm32_spi_setup_transfer;
333 ddata->bitbang.txrx_bufs = efm32_spi_txrx_bufs;
335 spin_lock_init(&ddata->lock);
336 init_completion(&ddata->done);
338 ddata->clk = devm_clk_get(&pdev->dev, NULL);
339 if (IS_ERR(ddata->clk)) {
340 ret = PTR_ERR(ddata->clk);
358 ddata->base = devm_ioremap_resource(&pdev->dev, res);
359 if (IS_ERR(ddata->base)) {
360 ret = PTR_ERR(ddata->base);
368 ddata->rxirq = ret;
372 ret = ddata->rxirq + 1;
374 ddata->txirq = ret;
376 ret = clk_prepare_enable(ddata->clk);
382 efm32_spi_probe_dt(pdev, master, ddata);
384 efm32_spi_write32(ddata, 0, REG_IEN);
385 efm32_spi_write32(ddata, REG_ROUTE_TXPEN | REG_ROUTE_RXPEN |
387 REG_ROUTE_LOCATION(ddata->pdata.location), REG_ROUTE);
389 ret = request_irq(ddata->rxirq, efm32_spi_rxirq,
390 0, DRIVER_NAME " rx", ddata);
396 ret = request_irq(ddata->txirq, efm32_spi_txirq,
397 0, DRIVER_NAME " tx", ddata);
403 ret = spi_bitbang_start(&ddata->bitbang);
407 free_irq(ddata->txirq, ddata);
409 free_irq(ddata->rxirq, ddata);
411 clk_disable_unprepare(ddata->clk);
422 struct efm32_spi_ddata *ddata = spi_master_get_devdata(master);
424 spi_bitbang_stop(&ddata->bitbang);
426 efm32_spi_write32(ddata, 0, REG_IEN);
428 free_irq(ddata->txirq, ddata);
429 free_irq(ddata->rxirq, ddata);
430 clk_disable_unprepare(ddata->clk);