Lines Matching defs:master
63 snprintf(name, 32, "dw_spi%d", dws->master->bus_num);
186 dev_err(&dws->master->dev, "RX FIFO overflow detected\n");
191 dev_err(&dws->master->dev, "RX FIFO underflow detected\n");
196 dev_err(&dws->master->dev, "TX FIFO overflow detected\n");
203 if (dws->master->cur_msg)
204 dws->master->cur_msg->status = ret;
216 spi_finalize_current_transfer(dws->master);
230 spi_finalize_current_transfer(dws->master);
251 struct spi_controller *master = dev_id;
252 struct dw_spi *dws = spi_controller_get_devdata(master);
258 if (!master->cur_msg) {
403 static int dw_spi_transfer_one(struct spi_controller *master,
406 struct dw_spi *dws = spi_controller_get_devdata(master);
431 if (master->can_dma && master->can_dma(master, spi, transfer))
432 dws->dma_mapped = master->cur_msg_mapped;
455 static void dw_spi_handle_err(struct spi_controller *master,
458 struct dw_spi *dws = spi_controller_get_devdata(master);
567 dev_err(&dws->master->dev, "CS de-assertion on Tx\n");
587 dev_err(&dws->master->dev, "FIFO overflow on Rx\n");
628 dev_err(&dws->master->dev, "Mem op hanged up\n");
838 struct spi_controller *master;
844 master = spi_alloc_master(dev, 0);
845 if (!master)
848 dws->master = master;
851 spi_controller_set_devdata(master, dws);
857 master);
865 master->use_gpio_descriptors = true;
866 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LOOP;
867 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16);
868 master->bus_num = dws->bus_num;
869 master->num_chipselect = dws->num_cs;
870 master->setup = dw_spi_setup;
871 master->cleanup = dw_spi_cleanup;
873 master->set_cs = dws->set_cs;
875 master->set_cs = dw_spi_set_cs;
876 master->transfer_one = dw_spi_transfer_one;
877 master->handle_err = dw_spi_handle_err;
879 master->mem_ops = &dws->mem_ops;
880 master->max_speed_hz = dws->max_freq;
881 master->dev.of_node = dev->of_node;
882 master->dev.fwnode = dev->fwnode;
883 master->flags = SPI_MASTER_GPIO_SS;
884 master->auto_runtime_pm = true;
895 master->can_dma = dws->dma_ops->can_dma;
896 master->flags |= SPI_CONTROLLER_MUST_TX;
900 ret = spi_register_controller(master);
902 dev_err(&master->dev, "problem registering spi master\n");
913 free_irq(dws->irq, master);
915 spi_controller_put(master);
924 spi_unregister_controller(dws->master);
931 free_irq(dws->irq, dws->master);
939 ret = spi_controller_suspend(dws->master);
950 spi_hw_init(&dws->master->dev, dws);
951 return spi_controller_resume(dws->master);