Lines Matching defs:DLN2_SPI_CMD
17 #define DLN2_SPI_CMD(cmd) DLN2_CMD(cmd, DLN2_SPI_MODULE_ID)
20 #define DLN2_SPI_GET_PORT_COUNT DLN2_SPI_CMD(0x00)
21 #define DLN2_SPI_ENABLE DLN2_SPI_CMD(0x11)
22 #define DLN2_SPI_DISABLE DLN2_SPI_CMD(0x12)
23 #define DLN2_SPI_IS_ENABLED DLN2_SPI_CMD(0x13)
24 #define DLN2_SPI_SET_MODE DLN2_SPI_CMD(0x14)
25 #define DLN2_SPI_GET_MODE DLN2_SPI_CMD(0x15)
26 #define DLN2_SPI_SET_FRAME_SIZE DLN2_SPI_CMD(0x16)
27 #define DLN2_SPI_GET_FRAME_SIZE DLN2_SPI_CMD(0x17)
28 #define DLN2_SPI_SET_FREQUENCY DLN2_SPI_CMD(0x18)
29 #define DLN2_SPI_GET_FREQUENCY DLN2_SPI_CMD(0x19)
30 #define DLN2_SPI_READ_WRITE DLN2_SPI_CMD(0x1A)
31 #define DLN2_SPI_READ DLN2_SPI_CMD(0x1B)
32 #define DLN2_SPI_WRITE DLN2_SPI_CMD(0x1C)
33 #define DLN2_SPI_SET_DELAY_BETWEEN_SS DLN2_SPI_CMD(0x20)
34 #define DLN2_SPI_GET_DELAY_BETWEEN_SS DLN2_SPI_CMD(0x21)
35 #define DLN2_SPI_SET_DELAY_AFTER_SS DLN2_SPI_CMD(0x22)
36 #define DLN2_SPI_GET_DELAY_AFTER_SS DLN2_SPI_CMD(0x23)
37 #define DLN2_SPI_SET_DELAY_BETWEEN_FRAMES DLN2_SPI_CMD(0x24)
38 #define DLN2_SPI_GET_DELAY_BETWEEN_FRAMES DLN2_SPI_CMD(0x25)
39 #define DLN2_SPI_SET_SS DLN2_SPI_CMD(0x26)
40 #define DLN2_SPI_GET_SS DLN2_SPI_CMD(0x27)
41 #define DLN2_SPI_RELEASE_SS DLN2_SPI_CMD(0x28)
42 #define DLN2_SPI_SS_VARIABLE_ENABLE DLN2_SPI_CMD(0x2B)
43 #define DLN2_SPI_SS_VARIABLE_DISABLE DLN2_SPI_CMD(0x2C)
44 #define DLN2_SPI_SS_VARIABLE_IS_ENABLED DLN2_SPI_CMD(0x2D)
45 #define DLN2_SPI_SS_AAT_ENABLE DLN2_SPI_CMD(0x2E)
46 #define DLN2_SPI_SS_AAT_DISABLE DLN2_SPI_CMD(0x2F)
47 #define DLN2_SPI_SS_AAT_IS_ENABLED DLN2_SPI_CMD(0x30)
48 #define DLN2_SPI_SS_BETWEEN_FRAMES_ENABLE DLN2_SPI_CMD(0x31)
49 #define DLN2_SPI_SS_BETWEEN_FRAMES_DISABLE DLN2_SPI_CMD(0x32)
50 #define DLN2_SPI_SS_BETWEEN_FRAMES_IS_ENABLED DLN2_SPI_CMD(0x33)
51 #define DLN2_SPI_SET_CPHA DLN2_SPI_CMD(0x34)
52 #define DLN2_SPI_GET_CPHA DLN2_SPI_CMD(0x35)
53 #define DLN2_SPI_SET_CPOL DLN2_SPI_CMD(0x36)
54 #define DLN2_SPI_GET_CPOL DLN2_SPI_CMD(0x37)
55 #define DLN2_SPI_SS_MULTI_ENABLE DLN2_SPI_CMD(0x38)
56 #define DLN2_SPI_SS_MULTI_DISABLE DLN2_SPI_CMD(0x39)
57 #define DLN2_SPI_SS_MULTI_IS_ENABLED DLN2_SPI_CMD(0x3A)
58 #define DLN2_SPI_GET_SUPPORTED_MODES DLN2_SPI_CMD(0x40)
59 #define DLN2_SPI_GET_SUPPORTED_CPHA_VALUES DLN2_SPI_CMD(0x41)
60 #define DLN2_SPI_GET_SUPPORTED_CPOL_VALUES DLN2_SPI_CMD(0x42)
61 #define DLN2_SPI_GET_SUPPORTED_FRAME_SIZES DLN2_SPI_CMD(0x43)
62 #define DLN2_SPI_GET_SS_COUNT DLN2_SPI_CMD(0x44)
63 #define DLN2_SPI_GET_MIN_FREQUENCY DLN2_SPI_CMD(0x45)
64 #define DLN2_SPI_GET_MAX_FREQUENCY DLN2_SPI_CMD(0x46)
65 #define DLN2_SPI_GET_MIN_DELAY_BETWEEN_SS DLN2_SPI_CMD(0x47)
66 #define DLN2_SPI_GET_MAX_DELAY_BETWEEN_SS DLN2_SPI_CMD(0x48)
67 #define DLN2_SPI_GET_MIN_DELAY_AFTER_SS DLN2_SPI_CMD(0x49)
68 #define DLN2_SPI_GET_MAX_DELAY_AFTER_SS DLN2_SPI_CMD(0x4A)
69 #define DLN2_SPI_GET_MIN_DELAY_BETWEEN_FRAMES DLN2_SPI_CMD(0x4B)
70 #define DLN2_SPI_GET_MAX_DELAY_BETWEEN_FRAMES DLN2_SPI_CMD(0x4C)