Lines Matching refs:reg
117 u32 reg;
120 reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
122 reg &= ~BIT(cs);
124 reg |= BIT(cs);
126 __raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);
134 u32 reg;
136 reg = DIV_ROUND_UP(2048, DIV_ROUND_UP(bs->speed_hz, hz));
137 __raw_writel(CLK_CTRL_ACCUM_RST_ON_LOOP | reg,
140 reg = __raw_readl(bs->regs + HSSPI_PROFILE_SIGNAL_CTRL_REG(profile));
142 reg |= SIGNAL_CTRL_ASYNC_INPUT_PATH;
144 reg &= ~SIGNAL_CTRL_ASYNC_INPUT_PATH;
145 __raw_writel(reg, bs->regs + HSSPI_PROFILE_SIGNAL_CTRL_REG(profile));
149 reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
150 reg &= ~GLOBAL_CTRL_CLK_POLARITY;
152 reg |= GLOBAL_CTRL_CLK_POLARITY;
153 __raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);
234 u32 reg;
236 reg = __raw_readl(bs->regs +
238 reg &= ~(SIGNAL_CTRL_LAUNCH_RISING | SIGNAL_CTRL_LATCH_RISING);
240 reg |= SIGNAL_CTRL_LAUNCH_RISING;
242 reg |= SIGNAL_CTRL_LATCH_RISING;
243 __raw_writel(reg, bs->regs +
247 reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
250 if ((reg & GLOBAL_CTRL_CS_POLARITY_MASK) == bs->cs_polarity) {
252 reg |= BIT(spi->chip_select);
254 reg &= ~BIT(spi->chip_select);
255 __raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);
276 u32 reg;
309 reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
310 reg &= ~GLOBAL_CTRL_CS_POLARITY_MASK;
311 reg |= bs->cs_polarity;
312 __raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);
344 u32 reg, rate, num_cs = HSSPI_SPI_MAX_CS;
438 reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
439 bs->cs_polarity = reg & GLOBAL_CTRL_CS_POLARITY_MASK;
440 __raw_writel(reg | GLOBAL_CTRL_CLK_GATE_SSOFF,