Lines Matching refs:ctlr
90 * @ctlr: SPI controller reverse lookup
131 struct spi_controller *ctlr;
391 complete(&bs->ctlr->xfer_completion);
397 static int bcm2835_spi_transfer_one_irq(struct spi_controller *ctlr,
402 struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
428 * @ctlr: SPI master controller
472 static void bcm2835_spi_transfer_prologue(struct spi_controller *ctlr,
517 dma_sync_single_for_device(ctlr->dma_rx->device->dev,
596 struct spi_controller *ctlr = data;
597 struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
604 dmaengine_terminate_async(ctlr->dma_tx);
613 complete(&ctlr->xfer_completion);
624 struct spi_controller *ctlr = data;
625 struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
641 dmaengine_terminate_async(ctlr->dma_rx);
645 complete(&ctlr->xfer_completion);
650 * @ctlr: SPI master controller
659 static int bcm2835_spi_prepare_sg(struct spi_controller *ctlr,
676 chan = ctlr->dma_tx;
682 chan = ctlr->dma_rx;
698 desc->callback_param = ctlr;
701 desc->callback_param = ctlr;
713 * @ctlr: SPI master controller
758 static int bcm2835_spi_transfer_one_dma(struct spi_controller *ctlr,
763 struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
774 bcm2835_spi_transfer_prologue(ctlr, tfr, bs, cs);
778 ret = bcm2835_spi_prepare_sg(ctlr, spi, tfr, bs, true);
797 dma_async_issue_pending(ctlr->dma_tx);
804 ret = bcm2835_spi_prepare_sg(ctlr, spi, tfr, bs, false);
811 dmaengine_terminate_sync(ctlr->dma_tx);
817 dma_async_issue_pending(ctlr->dma_rx);
827 dmaengine_terminate_async(ctlr->dma_rx);
840 static bool bcm2835_spi_can_dma(struct spi_controller *ctlr,
852 static void bcm2835_dma_release(struct spi_controller *ctlr,
857 if (ctlr->dma_tx) {
858 dmaengine_terminate_sync(ctlr->dma_tx);
864 dma_unmap_page_attrs(ctlr->dma_tx->device->dev,
869 dma_release_channel(ctlr->dma_tx);
870 ctlr->dma_tx = NULL;
873 if (ctlr->dma_rx) {
874 dmaengine_terminate_sync(ctlr->dma_rx);
881 dma_unmap_single(ctlr->dma_rx->device->dev,
886 dma_release_channel(ctlr->dma_rx);
887 ctlr->dma_rx = NULL;
891 static int bcm2835_dma_init(struct spi_controller *ctlr, struct device *dev,
900 addr = of_get_address(ctlr->dev.of_node, 0, NULL, NULL);
909 ctlr->dma_tx = dma_request_chan(dev, "tx");
910 if (IS_ERR(ctlr->dma_tx)) {
912 ret = PTR_ERR(ctlr->dma_tx);
913 ctlr->dma_tx = NULL;
916 ctlr->dma_rx = dma_request_chan(dev, "rx");
917 if (IS_ERR(ctlr->dma_rx)) {
919 ret = PTR_ERR(ctlr->dma_rx);
920 ctlr->dma_rx = NULL;
932 ret = dmaengine_slave_config(ctlr->dma_tx, &slave_config);
936 bs->fill_tx_addr = dma_map_page_attrs(ctlr->dma_tx->device->dev,
940 if (dma_mapping_error(ctlr->dma_tx->device->dev, bs->fill_tx_addr)) {
947 bs->fill_tx_desc = dmaengine_prep_dma_cyclic(ctlr->dma_tx,
973 ret = dmaengine_slave_config(ctlr->dma_rx, &slave_config);
977 bs->clear_rx_addr = dma_map_single(ctlr->dma_rx->device->dev,
981 if (dma_mapping_error(ctlr->dma_rx->device->dev, bs->clear_rx_addr)) {
989 bs->clear_rx_desc[i] = dmaengine_prep_dma_cyclic(ctlr->dma_rx,
1007 ctlr->can_dma = bcm2835_spi_can_dma;
1015 bcm2835_dma_release(ctlr, bs);
1027 static int bcm2835_spi_transfer_one_poll(struct spi_controller *ctlr,
1032 struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
1071 return bcm2835_spi_transfer_one_irq(ctlr, spi,
1082 static int bcm2835_spi_transfer_one(struct spi_controller *ctlr,
1086 struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
1130 return bcm2835_spi_transfer_one_poll(ctlr, spi, tfr, cs);
1136 if (ctlr->can_dma && bcm2835_spi_can_dma(ctlr, spi, tfr))
1137 return bcm2835_spi_transfer_one_dma(ctlr, spi, tfr, cs);
1140 return bcm2835_spi_transfer_one_irq(ctlr, spi, tfr, cs, true);
1143 static int bcm2835_spi_prepare_message(struct spi_controller *ctlr,
1147 struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
1150 if (ctlr->can_dma) {
1156 ret = spi_split_transfers_maxsize(ctlr, msg, 65532,
1171 static void bcm2835_spi_handle_err(struct spi_controller *ctlr,
1174 struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
1177 if (ctlr->dma_tx) {
1178 dmaengine_terminate_sync(ctlr->dma_tx);
1181 if (ctlr->dma_rx) {
1182 dmaengine_terminate_sync(ctlr->dma_rx);
1198 struct spi_controller *ctlr = spi->controller;
1199 struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
1226 if (ctlr->dma_rx) {
1231 dma_sync_single_for_device(ctlr->dma_rx->device->dev,
1288 struct spi_controller *ctlr;
1292 ctlr = devm_spi_alloc_master(&pdev->dev, ALIGN(sizeof(*bs),
1294 if (!ctlr)
1297 platform_set_drvdata(pdev, ctlr);
1299 ctlr->use_gpio_descriptors = true;
1300 ctlr->mode_bits = BCM2835_SPI_MODE_BITS;
1301 ctlr->bits_per_word_mask = SPI_BPW_MASK(8);
1302 ctlr->num_chipselect = 3;
1303 ctlr->setup = bcm2835_spi_setup;
1304 ctlr->transfer_one = bcm2835_spi_transfer_one;
1305 ctlr->handle_err = bcm2835_spi_handle_err;
1306 ctlr->prepare_message = bcm2835_spi_prepare_message;
1307 ctlr->dev.of_node = pdev->dev.of_node;
1309 bs = spi_controller_get_devdata(ctlr);
1310 bs->ctlr = ctlr;
1328 err = bcm2835_dma_init(ctlr, &pdev->dev, bs);
1343 err = spi_register_controller(ctlr);
1355 bcm2835_dma_release(ctlr, bs);
1363 struct spi_controller *ctlr = platform_get_drvdata(pdev);
1364 struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
1368 spi_unregister_controller(ctlr);
1370 bcm2835_dma_release(ctlr, bs);