Lines Matching defs:BSPI
30 /* BSPI register offsets */
171 BSPI,
283 /* BSPI helpers */
290 if (!(bcm_qspi_read(qspi, BSPI, BSPI_BUSY_STATUS) & 1))
309 bcm_qspi_write(qspi, BSPI, BSPI_B0_CTRL, 1);
310 bcm_qspi_write(qspi, BSPI, BSPI_B1_CTRL, 1);
311 bcm_qspi_write(qspi, BSPI, BSPI_B0_CTRL, 0);
312 bcm_qspi_write(qspi, BSPI, BSPI_B1_CTRL, 0);
317 return (bcm_qspi_read(qspi, BSPI, BSPI_RAF_STATUS) &
323 u32 data = bcm_qspi_read(qspi, BSPI, BSPI_RAF_READ_DATA);
325 /* BSPI v3 LR is LE only, convert data to host endianness */
335 bcm_qspi_write(qspi, BSPI, BSPI_RAF_CTRL,
341 bcm_qspi_write(qspi, BSPI, BSPI_RAF_CTRL,
376 bcm_qspi_write(qspi, BSPI, BSPI_FLEX_MODE_ENABLE, 0);
377 bcm_qspi_write(qspi, BSPI, BSPI_BITS_PER_CYCLE, bpc);
378 bcm_qspi_write(qspi, BSPI, BSPI_BITS_PER_PHASE, bpp);
379 bcm_qspi_write(qspi, BSPI, BSPI_CMD_AND_MODE_BYTE, cmd_byte);
380 bcm_qspi_write(qspi, BSPI, BSPI_FLEX_MODE_ENABLE, flex_mode);
434 u32 data = bcm_qspi_read(qspi, BSPI, BSPI_STRAP_OVERRIDE_CTRL);
468 bcm_qspi_write(qspi, BSPI, BSPI_STRAP_OVERRIDE_CTRL, data);
487 val = bcm_qspi_read(qspi, BSPI, BSPI_STRAP_OVERRIDE_CTRL);
491 bcm_qspi_write(qspi, BSPI, BSPI_FLEX_MODE_ENABLE, 0);
526 if ((bcm_qspi_read(qspi, BSPI, BSPI_MAST_N_BOOT_CTRL) & 1) == 0)
531 bcm_qspi_write(qspi, BSPI, BSPI_MAST_N_BOOT_CTRL, 0);
541 if ((bcm_qspi_read(qspi, BSPI, BSPI_MAST_N_BOOT_CTRL) & 1))
545 bcm_qspi_write(qspi, BSPI, BSPI_MAST_N_BOOT_CTRL, 1);
886 bcm_qspi_write(qspi, BSPI,
919 bcm_qspi_write(qspi, BSPI, BSPI_RAF_START_ADDR, addr);
920 bcm_qspi_write(qspi, BSPI, BSPI_RAF_NUM_WORDS, len_words);
921 bcm_qspi_write(qspi, BSPI, BSPI_RAF_WATERMARK, 0);
924 * clear soc MSPI and BSPI interrupts and enable
925 * BSPI interrupts.
931 /* Must flush previous writes before starting BSPI operation */
935 dev_err(&qspi->pdev->dev, "timeout waiting for BSPI\n");
1038 * But for BSPI <= V3, we need to convert it to a remapped BSPI
1104 /* disable soc BSPI interrupt */
1118 /* clear soc BSPI interrupt */
1135 dev_err(&qspi->pdev->dev, "BSPI INT error\n");
1218 val = bcm_qspi_read(qspi, BSPI, BSPI_REVISION_ID);
1222 /* Force mapping of BSPI address -> flash offset */
1223 bcm_qspi_write(qspi, BSPI, BSPI_BSPI_XOR_VALUE, 0);
1224 bcm_qspi_write(qspi, BSPI, BSPI_BSPI_XOR_ENABLE, 1);
1228 bcm_qspi_write(qspi, BSPI, BSPI_B0_CTRL, 0);
1229 bcm_qspi_write(qspi, BSPI, BSPI_B1_CTRL, 0);
1378 qspi->base[BSPI] = devm_ioremap_resource(dev, res);
1379 if (IS_ERR(qspi->base[BSPI]))
1380 return PTR_ERR(qspi->base[BSPI]);
1528 bcm_qspi_read(qspi, BSPI, BSPI_STRAP_OVERRIDE_CTRL);