Lines Matching defs:bytes
403 unsigned int bytes)
409 val |= (bytes - 1) << A3700_SPI_RFIFO_THRS_BIT;
411 val |= (7 - bytes) << A3700_SPI_WFIFO_THRS_BIT;
424 /* Use 4 bytes long transfers. Each transfer method has its way to deal
425 * with the remaining bytes for non 4-bytes aligned transfers.
459 * when tx data is not 4 bytes aligned, there will be unexpected
460 * bytes out of SPI output register, since it always shifts out
461 * as whole 4 bytes. This might cause incorrect transaction with
463 * transfer up to 3 bytes of data first, and then make the rest
475 /* transfer 1~3 bytes through address count */
529 * When remain bytes is not larger than 4, we should
531 * buffer bytes.
617 /* Transfer first bytes of data when buffer is not 4-byte aligned */
621 /* Clear WFIFO, since it's last 2 bytes are shifted out during
681 * - wait all the bytes in wfifo to be shifted out
687 * after the number of bytes indicated in DIN_CNT
752 /* When we have less than 4 bytes to transfer, switch to 1 byte