Lines Matching refs:xvcu
281 * @xvcu: Pointer to the xvcu_device structure
294 static int xvcu_set_vcu_pll_info(struct xvcu_device *xvcu)
303 inte = xvcu_read(xvcu->logicore_reg_ba, VCU_PLL_CLK);
304 deci = xvcu_read(xvcu->logicore_reg_ba, VCU_PLL_CLK_DEC);
305 coreclk = xvcu_read(xvcu->logicore_reg_ba, VCU_CORE_CLK) * MHZ;
306 mcuclk = xvcu_read(xvcu->logicore_reg_ba, VCU_MCU_CLK) * MHZ;
308 dev_err(xvcu->dev, "Invalid mcu and core clock data\n");
313 dev_dbg(xvcu->dev, "Ref clock from logicoreIP is %uHz\n", refclk);
314 dev_dbg(xvcu->dev, "Core clock from logicoreIP is %uHz\n", coreclk);
315 dev_dbg(xvcu->dev, "Mcu clock from logicoreIP is %uHz\n", mcuclk);
317 clk_disable_unprepare(xvcu->pll_ref);
318 ret = clk_set_rate(xvcu->pll_ref, refclk);
320 dev_warn(xvcu->dev, "failed to set logicoreIP refclk rate\n");
322 ret = clk_prepare_enable(xvcu->pll_ref);
324 dev_err(xvcu->dev, "failed to enable pll_ref clock source\n");
328 refclk = clk_get_rate(xvcu->pll_ref);
335 vcu_pll_ctrl = xvcu_read(xvcu->vcu_slcr_ba, VCU_PLL_CTRL);
339 dev_err(xvcu->dev, "clkoutdiv value is invalid\n");
373 dev_err(xvcu->dev, "Invalid clock combination.\n");
377 xvcu->coreclk = pll_clk / divisor_core;
379 dev_dbg(xvcu->dev, "Actual Ref clock freq is %uHz\n", refclk);
380 dev_dbg(xvcu->dev, "Actual Core clock freq is %uHz\n", xvcu->coreclk);
381 dev_dbg(xvcu->dev, "Actual Mcu clock freq is %uHz\n", mcuclk);
394 xvcu_write(xvcu->vcu_slcr_ba, VCU_PLL_CTRL, vcu_pll_ctrl);
397 ctrl = xvcu_read(xvcu->vcu_slcr_ba, VCU_ENC_CORE_CTRL);
403 xvcu_write(xvcu->vcu_slcr_ba, VCU_ENC_CORE_CTRL, ctrl);
405 ctrl = xvcu_read(xvcu->vcu_slcr_ba, VCU_DEC_CORE_CTRL);
411 xvcu_write(xvcu->vcu_slcr_ba, VCU_DEC_CORE_CTRL, ctrl);
413 ctrl = xvcu_read(xvcu->vcu_slcr_ba, VCU_ENC_MCU_CTRL);
418 xvcu_write(xvcu->vcu_slcr_ba, VCU_ENC_MCU_CTRL, ctrl);
420 ctrl = xvcu_read(xvcu->vcu_slcr_ba, VCU_DEC_MCU_CTRL);
425 xvcu_write(xvcu->vcu_slcr_ba, VCU_DEC_MCU_CTRL, ctrl);
433 xvcu_write(xvcu->vcu_slcr_ba, VCU_PLL_CFG, cfg_val);
440 * @xvcu: Pointer to the xvcu_device structure
447 static int xvcu_set_pll(struct xvcu_device *xvcu)
453 ret = xvcu_set_vcu_pll_info(xvcu);
455 dev_err(xvcu->dev, "failed to set pll info\n");
459 xvcu_write_field_reg(xvcu->vcu_slcr_ba, VCU_PLL_CTRL,
462 xvcu_write_field_reg(xvcu->vcu_slcr_ba, VCU_PLL_CTRL,
465 xvcu_write_field_reg(xvcu->vcu_slcr_ba, VCU_PLL_CTRL,
474 lock_status = xvcu_read(xvcu->vcu_slcr_ba, VCU_PLL_STATUS);
476 xvcu_write_field_reg(xvcu->vcu_slcr_ba, VCU_PLL_CTRL,
484 dev_err(xvcu->dev, "PLL is not locked\n");
500 struct xvcu_device *xvcu;
503 xvcu = devm_kzalloc(&pdev->dev, sizeof(*xvcu), GFP_KERNEL);
504 if (!xvcu)
507 xvcu->dev = &pdev->dev;
514 xvcu->vcu_slcr_ba = devm_ioremap(&pdev->dev, res->start,
516 if (!xvcu->vcu_slcr_ba) {
527 xvcu->logicore_reg_ba = devm_ioremap(&pdev->dev, res->start,
529 if (!xvcu->logicore_reg_ba) {
534 xvcu->aclk = devm_clk_get(&pdev->dev, "aclk");
535 if (IS_ERR(xvcu->aclk)) {
537 return PTR_ERR(xvcu->aclk);
540 xvcu->pll_ref = devm_clk_get(&pdev->dev, "pll_ref");
541 if (IS_ERR(xvcu->pll_ref)) {
543 return PTR_ERR(xvcu->pll_ref);
546 ret = clk_prepare_enable(xvcu->aclk);
552 ret = clk_prepare_enable(xvcu->pll_ref);
563 xvcu_write(xvcu->logicore_reg_ba, VCU_GASKET_INIT, VCU_GASKET_VALUE);
566 ret = xvcu_set_pll(xvcu);
572 dev_set_drvdata(&pdev->dev, xvcu);
579 clk_disable_unprepare(xvcu->pll_ref);
581 clk_disable_unprepare(xvcu->aclk);
595 struct xvcu_device *xvcu;
597 xvcu = platform_get_drvdata(pdev);
598 if (!xvcu)
602 xvcu_write(xvcu->logicore_reg_ba, VCU_GASKET_INIT, 0);
604 clk_disable_unprepare(xvcu->pll_ref);
605 clk_disable_unprepare(xvcu->aclk);