Lines Matching refs:data

318 	int (*irq_set_wake)(struct irq_data *data, unsigned int on);
319 	int (*irq_set_type)(struct irq_data *data, unsigned int type);
349  * @soc: pointer to SoC data structure
964 				    unsigned long action, void *data)
966 	const char *cmd = data;
998 static int powergate_show(struct seq_file *s, void *data)
1694 	if (of_property_read_u32(np, "nvidia,reg-data", &reg_data)) {
1695 		dev_err(dev, "nvidia,reg-data missing, %s.\n", disabled);
1962 			       unsigned int num_irqs, void *data)
1966 	struct irq_fwspec *fwspec = data;
2029 static int tegra210_pmc_irq_set_wake(struct irq_data *data, unsigned int on)
2031 	struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data);
2035 	offset = data->hwirq / 32;
2036 	bit = data->hwirq % 32;
2046 	if (data->hwirq >= 32)
2063 static int tegra210_pmc_irq_set_type(struct irq_data *data, unsigned int type)
2065 	struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data);
2069 	offset = data->hwirq / 32;
2070 	bit = data->hwirq % 32;
2072 	if (data->hwirq >= 32)
2103 static int tegra186_pmc_irq_set_wake(struct irq_data *data, unsigned int on)
2105 	struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data);
2109 	offset = data->hwirq / 32;
2110 	bit = data->hwirq % 32;
2113 	writel(0x1, pmc->wake + WAKE_AOWAKE_STATUS_W(data->hwirq));
2126 	writel(!!on, pmc->wake + WAKE_AOWAKE_MASK_W(data->hwirq));
2131 static int tegra186_pmc_irq_set_type(struct irq_data *data, unsigned int type)
2133 	struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data);
2136 	value = readl(pmc->wake + WAKE_AOWAKE_CNTRL(data->hwirq));
2157 	writel(value, pmc->wake + WAKE_AOWAKE_CNTRL(data->hwirq));
2162 static void tegra_irq_mask_parent(struct irq_data *data)
2164 	if (data->parent_data)
2165 		irq_chip_mask_parent(data);
2168 static void tegra_irq_unmask_parent(struct irq_data *data)
2170 	if (data->parent_data)
2171 		irq_chip_unmask_parent(data);
2174 static void tegra_irq_eoi_parent(struct irq_data *data)
2176 	if (data->parent_data)
2177 		irq_chip_eoi_parent(data);
2180 static int tegra_irq_set_affinity_parent(struct irq_data *data,
2184 	if (data->parent_data)
2185 		return irq_chip_set_affinity_parent(data, dest, force);
2226 	struct clk_notifier_data *data = ptr;
2234 		pmc->rate = data->new_rate;
2328 			   const struct pmc_clk_init_data *data,
2338 	init.name = data->name;
2340 	init.parent_names = data->parents;
2341 	init.num_parents = data->num_parents;
2347 	pmc_clk->mux_shift = data->mux_shift;
2348 	pmc_clk->force_en_shift = data->force_en_shift;
2437 		const struct pmc_clk_init_data *data;
2439 		data = pmc->soc->pmc_clks_data + i;
2441 		clk = tegra_pmc_clk_out_register(pmc, data, PMC_CLK_OUT_CNTRL);
2444 				 data->name, PTR_ERR_OR_ZERO(clk));
2448 		err = clk_register_clkdev(clk, data->name, NULL);
2452 				 data->name, err);
2456 		clk_data->clks[data->clk_id] = clk;
2509 	 * register mapping and setup the soc data pointer. If these
3480 	{ .compatible = "nvidia,tegra234-pmc", .data = &tegra234_pmc_soc },
3481 	{ .compatible = "nvidia,tegra194-pmc", .data = &tegra194_pmc_soc },
3482 	{ .compatible = "nvidia,tegra186-pmc", .data = &tegra186_pmc_soc },
3483 	{ .compatible = "nvidia,tegra210-pmc", .data = &tegra210_pmc_soc },
3484 	{ .compatible = "nvidia,tegra132-pmc", .data = &tegra124_pmc_soc },
3485 	{ .compatible = "nvidia,tegra124-pmc", .data = &tegra124_pmc_soc },
3486 	{ .compatible = "nvidia,tegra114-pmc", .data = &tegra114_pmc_soc },
3487 	{ .compatible = "nvidia,tegra30-pmc", .data = &tegra30_pmc_soc },
3488 	{ .compatible = "nvidia,tegra20-pmc", .data = &tegra20_pmc_soc },
3554 		 * SoC data can't be matched and therefore powergating is
3592 		pmc->soc = match->data;