Lines Matching defs:fuse
21 #include <soc/tegra/fuse.h>
23 #include "fuse.h"
29 static u32 tegra20_fuse_read_early(struct tegra_fuse *fuse, unsigned int offset)
31 return readl_relaxed(fuse->base + FUSE_BEGIN + offset);
36 struct tegra_fuse *fuse = args;
38 complete(&fuse->apbdma.wait);
41 static u32 tegra20_fuse_read(struct tegra_fuse *fuse, unsigned int offset)
49 mutex_lock(&fuse->apbdma.lock);
51 fuse->apbdma.config.src_addr = fuse->phys + FUSE_BEGIN + offset;
53 err = dmaengine_slave_config(fuse->apbdma.chan, &fuse->apbdma.config);
57 dma_desc = dmaengine_prep_slave_single(fuse->apbdma.chan,
58 fuse->apbdma.phys,
65 dma_desc->callback_param = fuse;
67 reinit_completion(&fuse->apbdma.wait);
69 clk_prepare_enable(fuse->clk);
72 dma_async_issue_pending(fuse->apbdma.chan);
73 time_left = wait_for_completion_timeout(&fuse->apbdma.wait,
77 dmaengine_terminate_all(fuse->apbdma.chan);
79 value = *fuse->apbdma.virt;
81 clk_disable_unprepare(fuse->clk);
84 mutex_unlock(&fuse->apbdma.lock);
95 static int tegra20_fuse_probe(struct tegra_fuse *fuse)
102 fuse->apbdma.chan = dma_request_channel(mask, dma_filter, NULL);
103 if (!fuse->apbdma.chan)
106 fuse->apbdma.virt = dma_alloc_coherent(fuse->dev, sizeof(u32),
107 &fuse->apbdma.phys,
109 if (!fuse->apbdma.virt) {
110 dma_release_channel(fuse->apbdma.chan);
114 fuse->apbdma.config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
115 fuse->apbdma.config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
116 fuse->apbdma.config.src_maxburst = 1;
117 fuse->apbdma.config.dst_maxburst = 1;
118 fuse->apbdma.config.direction = DMA_DEV_TO_MEM;
119 fuse->apbdma.config.device_fc = false;
121 init_completion(&fuse->apbdma.wait);
122 mutex_init(&fuse->apbdma.lock);
123 fuse->read = tegra20_fuse_read;
153 static void __init tegra20_fuse_init(struct tegra_fuse *fuse)
155 fuse->read_early = tegra20_fuse_read_early;
158 fuse->soc->speedo_init(&tegra_sku_info);