Lines Matching defs:reg
74 unsigned int reg;
77 reg = flowctrl_read_cpu_csr(cpuid);
81 reg &= ~TEGRA20_FLOW_CTRL_CSR_WFE_BITMAP;
83 reg &= ~TEGRA20_FLOW_CTRL_CSR_WFI_BITMAP;
85 reg |= TEGRA20_FLOW_CTRL_CSR_WFE_CPU0 << cpuid;
91 reg &= ~TEGRA30_FLOW_CTRL_CSR_WFE_BITMAP;
93 reg &= ~TEGRA30_FLOW_CTRL_CSR_WFI_BITMAP;
106 reg |= TEGRA20_FLOW_CTRL_CSR_WFE_CPU0 << cpuid;
109 reg |= TEGRA30_FLOW_CTRL_CSR_WFI_CPU0 << cpuid;
113 reg |= FLOW_CTRL_CSR_INTR_FLAG; /* clear intr flag */
114 reg |= FLOW_CTRL_CSR_EVENT_FLAG; /* clear event flag */
115 reg |= FLOW_CTRL_CSR_ENABLE; /* pwr gating */
116 flowctrl_write_cpu_csr(cpuid, reg);
121 reg = flowctrl_read_cpu_csr(i);
122 reg |= FLOW_CTRL_CSR_EVENT_FLAG;
123 reg |= FLOW_CTRL_CSR_INTR_FLAG;
124 flowctrl_write_cpu_csr(i, reg);
130 unsigned int reg;
133 reg = flowctrl_read_cpu_csr(cpuid);
137 reg &= ~TEGRA20_FLOW_CTRL_CSR_WFE_BITMAP;
139 reg &= ~TEGRA20_FLOW_CTRL_CSR_WFI_BITMAP;
145 reg &= ~TEGRA30_FLOW_CTRL_CSR_WFE_BITMAP;
147 reg &= ~TEGRA30_FLOW_CTRL_CSR_WFI_BITMAP;
150 reg &= ~FLOW_CTRL_CSR_ENABLE; /* clear enable */
151 reg |= FLOW_CTRL_CSR_INTR_FLAG; /* clear intr */
152 reg |= FLOW_CTRL_CSR_EVENT_FLAG; /* clear event */
153 flowctrl_write_cpu_csr(cpuid, reg);