Lines Matching defs:queue
28 void qmgr_put_entry(unsigned int queue, u32 val)
31 BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */
34 qmgr_queue_descs[queue], queue, val);
36 __raw_writel(val, &qmgr_regs->acc[queue][0]);
39 u32 qmgr_get_entry(unsigned int queue)
42 val = __raw_readl(&qmgr_regs->acc[queue][0]);
44 BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */
47 qmgr_queue_descs[queue], queue, val);
52 static int __qmgr_get_stat1(unsigned int queue)
54 return (__raw_readl(&qmgr_regs->stat1[queue >> 3])
55 >> ((queue & 7) << 2)) & 0xF;
58 static int __qmgr_get_stat2(unsigned int queue)
60 BUG_ON(queue >= HALF_QUEUES);
61 return (__raw_readl(&qmgr_regs->stat2[queue >> 4])
62 >> ((queue & 0xF) << 1)) & 0x3;
66 * qmgr_stat_empty() - checks if a hardware queue is empty
67 * @queue: queue number
69 * Returns non-zero value if the queue is empty.
71 int qmgr_stat_empty(unsigned int queue)
73 BUG_ON(queue >= HALF_QUEUES);
74 return __qmgr_get_stat1(queue) & QUEUE_STAT1_EMPTY;
78 * qmgr_stat_below_low_watermark() - checks if a queue is below low watermark
79 * @queue: queue number
81 * Returns non-zero value if the queue is below low watermark.
83 int qmgr_stat_below_low_watermark(unsigned int queue)
85 if (queue >= HALF_QUEUES)
87 (queue - HALF_QUEUES)) & 0x01;
88 return __qmgr_get_stat1(queue) & QUEUE_STAT1_NEARLY_EMPTY;
92 * qmgr_stat_full() - checks if a hardware queue is full
93 * @queue: queue number
95 * Returns non-zero value if the queue is full.
97 int qmgr_stat_full(unsigned int queue)
99 if (queue >= HALF_QUEUES)
101 (queue - HALF_QUEUES)) & 0x01;
102 return __qmgr_get_stat1(queue) & QUEUE_STAT1_FULL;
106 * qmgr_stat_overflow() - checks if a hardware queue experienced overflow
107 * @queue: queue number
109 * Returns non-zero value if the queue experienced overflow.
111 int qmgr_stat_overflow(unsigned int queue)
113 return __qmgr_get_stat2(queue) & QUEUE_STAT2_OVERFLOW;
116 void qmgr_set_irq(unsigned int queue, int src,
122 if (queue < HALF_QUEUES) {
126 reg = &qmgr_regs->irqsrc[queue >> 3]; /* 8 queues per u32 */
127 bit = (queue % 8) * 4; /* 3 bits + 1 reserved bit per queue */
134 irq_handlers[queue] = handler;
135 irq_pdevs[queue] = pdev;
150 i = __fls(en_bitmap); /* number of the last "low" queue */
176 i = __fls(req_bitmap); /* number of the last "high" queue */
195 i = __fls(req_bitmap); /* number of the last queue */
204 void qmgr_enable_irq(unsigned int queue)
207 int half = queue / 32;
208 u32 mask = 1 << (queue & (HALF_QUEUES - 1));
216 void qmgr_disable_irq(unsigned int queue)
219 int half = queue / 32;
220 u32 mask = 1 << (queue & (HALF_QUEUES - 1));
238 int qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */,
243 int __qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */,
251 BUG_ON(queue >= QUEUES);
286 if (__raw_readl(&qmgr_regs->sram[queue])) {
302 " queue %i\n", queue);
312 __raw_writel(cfg | (addr << 14), &qmgr_regs->sram[queue]);
314 snprintf(qmgr_queue_descs[queue], sizeof(qmgr_queue_descs[0]),
316 printk(KERN_DEBUG "qmgr: requested queue %s(%i) addr = 0x%02X\n",
317 qmgr_queue_descs[queue], queue, addr);
328 void qmgr_release_queue(unsigned int queue)
332 BUG_ON(queue >= QUEUES); /* not in valid range */
335 cfg = __raw_readl(&qmgr_regs->sram[queue]);
353 printk(KERN_DEBUG "qmgr: releasing queue %s(%i)\n",
354 qmgr_queue_descs[queue], queue);
355 qmgr_queue_descs[queue][0] = '\x0';
358 while ((addr = qmgr_get_entry(queue)))
359 printk(KERN_ERR "qmgr: released queue %i not empty: 0x%08X\n",
360 queue, addr);
362 __raw_writel(0, &qmgr_regs->sram[queue]);
368 irq_handlers[queue] = NULL; /* catch IRQ bugs */
453 .compatible = "intel,ixp4xx-ahb-queue-manager",