Lines Matching defs:clock
118 int ucc_set_qe_mux_rxtx(unsigned int ucc_num, enum qe_clock clock,
138 switch (clock) {
153 switch (clock) {
168 switch (clock) {
184 switch (clock) {
202 /* Check for invalid combination of clock and UCC number */
215 static int ucc_get_tdm_common_clk(u32 tdm_num, enum qe_clock clock)
221 * clock source BRG3,4 and CLK1,2
223 * clock source BRG12,13 and CLK23,24
230 switch (clock) {
251 switch (clock) {
275 static int ucc_get_tdm_rx_clk(u32 tdm_num, enum qe_clock clock)
281 switch (clock) {
293 switch (clock) {
305 switch (clock) {
317 switch (clock) {
329 switch (clock) {
341 switch (clock) {
353 switch (clock) {
365 switch (clock) {
381 static int ucc_get_tdm_tx_clk(u32 tdm_num, enum qe_clock clock)
387 switch (clock) {
399 switch (clock) {
411 switch (clock) {
423 switch (clock) {
435 switch (clock) {
447 switch (clock) {
459 switch (clock) {
471 switch (clock) {
489 enum qe_clock clock)
493 clock_bits = ucc_get_tdm_common_clk(tdm_num, clock);
497 clock_bits = ucc_get_tdm_rx_clk(tdm_num, clock);
499 clock_bits = ucc_get_tdm_tx_clk(tdm_num, clock);
516 int ucc_set_tdm_rxtx_clk(u32 tdm_num, enum qe_clock clock,
533 clock_bits = ucc_get_tdm_rxtx_clk(mode, tdm_num, clock);
548 static int ucc_get_tdm_sync_source(u32 tdm_num, enum qe_clock clock,
553 if (mode == COMM_DIR_RX && clock == QE_RSYNC_PIN) {
557 if (mode == COMM_DIR_TX && clock == QE_TSYNC_PIN) {
565 switch (clock) {
578 switch (clock) {
591 switch (clock) {
604 switch (clock) {
630 int ucc_set_tdm_rxtx_sync(u32 tdm_num, enum qe_clock clock,
646 source = ucc_get_tdm_sync_source(tdm_num, clock, mode);