Lines Matching defs:qe_gc
40 struct qe_gpio_chip *qe_gc =
44 qe_gc->cpdata = qe_ioread32be(®s->cpdata);
45 qe_gc->saved_regs.cpdata = qe_gc->cpdata;
46 qe_gc->saved_regs.cpdir1 = qe_ioread32be(®s->cpdir1);
47 qe_gc->saved_regs.cpdir2 = qe_ioread32be(®s->cpdir2);
48 qe_gc->saved_regs.cppar1 = qe_ioread32be(®s->cppar1);
49 qe_gc->saved_regs.cppar2 = qe_ioread32be(®s->cppar2);
50 qe_gc->saved_regs.cpodr = qe_ioread32be(®s->cpodr);
65 struct qe_gpio_chip *qe_gc = gpiochip_get_data(gc);
70 spin_lock_irqsave(&qe_gc->lock, flags);
73 qe_gc->cpdata |= pin_mask;
75 qe_gc->cpdata &= ~pin_mask;
77 qe_iowrite32be(qe_gc->cpdata, ®s->cpdata);
79 spin_unlock_irqrestore(&qe_gc->lock, flags);
86 struct qe_gpio_chip *qe_gc = gpiochip_get_data(gc);
91 spin_lock_irqsave(&qe_gc->lock, flags);
98 qe_gc->cpdata |= (1U << (QE_PIO_PINS - 1 - i));
100 qe_gc->cpdata &= ~(1U << (QE_PIO_PINS - 1 - i));
104 qe_iowrite32be(qe_gc->cpdata, ®s->cpdata);
106 spin_unlock_irqrestore(&qe_gc->lock, flags);
112 struct qe_gpio_chip *qe_gc = gpiochip_get_data(gc);
115 spin_lock_irqsave(&qe_gc->lock, flags);
119 spin_unlock_irqrestore(&qe_gc->lock, flags);
127 struct qe_gpio_chip *qe_gc = gpiochip_get_data(gc);
132 spin_lock_irqsave(&qe_gc->lock, flags);
136 spin_unlock_irqrestore(&qe_gc->lock, flags);
163 struct qe_gpio_chip *qe_gc;
188 qe_gc = gpiochip_get_data(gc);
190 spin_lock_irqsave(&qe_gc->lock, flags);
193 if (test_and_set_bit(QE_PIN_REQUESTED, &qe_gc->pin_flags[err]) == 0) {
194 qe_pin->controller = qe_gc;
201 spin_unlock_irqrestore(&qe_gc->lock, flags);
222 struct qe_gpio_chip *qe_gc = qe_pin->controller;
226 spin_lock_irqsave(&qe_gc->lock, flags);
227 test_and_clear_bit(QE_PIN_REQUESTED, &qe_gc->pin_flags[pin]);
228 spin_unlock_irqrestore(&qe_gc->lock, flags);
244 struct qe_gpio_chip *qe_gc = qe_pin->controller;
245 struct qe_pio_regs __iomem *regs = qe_gc->mm_gc.regs;
246 struct qe_pio_regs *sregs = &qe_gc->saved_regs;
253 spin_lock_irqsave(&qe_gc->lock, flags);
268 qe_gc->cpdata |= mask1;
270 qe_gc->cpdata &= ~mask1;
272 qe_iowrite32be(qe_gc->cpdata, ®s->cpdata);
275 spin_unlock_irqrestore(&qe_gc->lock, flags);
288 struct qe_gpio_chip *qe_gc = qe_pin->controller;
289 struct qe_pio_regs __iomem *regs = qe_gc->mm_gc.regs;
292 spin_lock_irqsave(&qe_gc->lock, flags);
297 spin_unlock_irqrestore(&qe_gc->lock, flags);
307 struct qe_gpio_chip *qe_gc;
311 qe_gc = kzalloc(sizeof(*qe_gc), GFP_KERNEL);
312 if (!qe_gc) {
317 spin_lock_init(&qe_gc->lock);
319 mm_gc = &qe_gc->mm_gc;
330 ret = of_mm_gpiochip_add_data(np, mm_gc, qe_gc);
337 kfree(qe_gc);