Lines Matching refs:ctx
91 static void brcm_pm_save_cp0_context(struct brcm_pm_s3_context *ctx)
94 ctx->cp0_regs[CONTEXT] = read_c0_context();
95 ctx->cp0_regs[USER_LOCAL] = read_c0_userlocal();
96 ctx->cp0_regs[PGMK] = read_c0_pagemask();
97 ctx->cp0_regs[HWRENA] = read_c0_cache();
98 ctx->cp0_regs[COMPARE] = read_c0_compare();
99 ctx->cp0_regs[STATUS] = read_c0_status();
102 ctx->cp0_regs[CONFIG] = read_c0_brcm_config();
103 ctx->cp0_regs[MODE] = read_c0_brcm_mode();
104 ctx->cp0_regs[EDSP] = read_c0_brcm_edsp();
105 ctx->cp0_regs[BOOT_VEC] = read_c0_brcm_bootvec();
106 ctx->cp0_regs[EBASE] = read_c0_ebase();
108 ctx->sc_boot_vec = bmips_read_zscm_reg(0xa0);
111 static void brcm_pm_restore_cp0_context(struct brcm_pm_s3_context *ctx)
114 bmips_write_zscm_reg(0xa0, ctx->sc_boot_vec);
117 write_c0_context(ctx->cp0_regs[CONTEXT]);
118 write_c0_userlocal(ctx->cp0_regs[USER_LOCAL]);
119 write_c0_pagemask(ctx->cp0_regs[PGMK]);
120 write_c0_cache(ctx->cp0_regs[HWRENA]);
121 write_c0_compare(ctx->cp0_regs[COMPARE]);
122 write_c0_status(ctx->cp0_regs[STATUS]);
125 write_c0_brcm_config(ctx->cp0_regs[CONFIG]);
126 write_c0_brcm_mode(ctx->cp0_regs[MODE]);
127 write_c0_brcm_edsp(ctx->cp0_regs[EDSP]);
128 write_c0_brcm_bootvec(ctx->cp0_regs[BOOT_VEC]);
129 write_c0_ebase(ctx->cp0_regs[EBASE]);