Lines Matching refs:esp
158 struct esp *esp; /* our ESP instance - for Scsi_host* */
172 static void zorro_esp_write8(struct esp *esp, u8 val, unsigned long reg)
174 writeb(val, esp->regs + (reg * 4UL));
177 static u8 zorro_esp_read8(struct esp *esp, unsigned long reg)
179 return readb(esp->regs + (reg * 4UL));
182 static int zorro_esp_irq_pending(struct esp *esp)
185 if (zorro_esp_read8(esp, ESP_STATUS) & ESP_STAT_INTR)
191 static int cyber_esp_irq_pending(struct esp *esp)
193 struct cyber_dma_registers __iomem *dregs = esp->dma_regs;
197 return ((zorro_esp_read8(esp, ESP_STATUS) & ESP_STAT_INTR) &&
201 static int fastlane_esp_irq_pending(struct esp *esp)
203 struct fastlane_dma_registers __iomem *dregs = esp->dma_regs;
215 (zorro_esp_read8(esp, ESP_STATUS) & ESP_STAT_INTR));
218 static u32 zorro_esp_dma_length_limit(struct esp *esp, u32 dma_addr,
224 static u32 fastlane_esp_dma_length_limit(struct esp *esp, u32 dma_addr,
231 static void zorro_esp_reset_dma(struct esp *esp)
236 static void zorro_esp_dma_drain(struct esp *esp)
241 static void zorro_esp_dma_invalidate(struct esp *esp)
246 static void fastlane_esp_dma_invalidate(struct esp *esp)
248 struct zorro_esp_priv *zep = dev_get_drvdata(esp->dev);
249 struct fastlane_dma_registers __iomem *dregs = esp->dma_regs;
259 static void zorro_esp_send_blz1230_dma_cmd(struct esp *esp, u32 addr,
262 struct blz1230_dma_registers __iomem *dregs = esp->dma_regs;
263 u8 phase = esp->sreg & ESP_STAT_PMASK;
266 * Use PIO if transferring message bytes to esp->command_block_dma.
267 * PIO requires a virtual address, so substitute esp->command_block
270 if (phase == ESP_MIP && addr == esp->command_block_dma) {
271 esp_send_pio_cmd(esp, (u32)esp->command_block, esp_count,
276 /* Clear the results of a possible prior esp->ops->send_dma_cmd() */
277 esp->send_cmd_error = 0;
278 esp->send_cmd_residual = 0;
282 dma_sync_single_for_device(esp->dev, addr, esp_count,
286 dma_sync_single_for_device(esp->dev, addr, esp_count,
301 scsi_esp_cmd(esp, ESP_CMD_DMA);
302 zorro_esp_write8(esp, (esp_count >> 0) & 0xff, ESP_TCLOW);
303 zorro_esp_write8(esp, (esp_count >> 8) & 0xff, ESP_TCMED);
305 scsi_esp_cmd(esp, cmd);
310 static void zorro_esp_send_blz1230II_dma_cmd(struct esp *esp, u32 addr,
313 struct blz1230II_dma_registers __iomem *dregs = esp->dma_regs;
314 u8 phase = esp->sreg & ESP_STAT_PMASK;
316 /* Use PIO if transferring message bytes to esp->command_block_dma */
317 if (phase == ESP_MIP && addr == esp->command_block_dma) {
318 esp_send_pio_cmd(esp, (u32)esp->command_block, esp_count,
323 esp->send_cmd_error = 0;
324 esp->send_cmd_residual = 0;
328 dma_sync_single_for_device(esp->dev, addr, esp_count,
332 dma_sync_single_for_device(esp->dev, addr, esp_count,
346 scsi_esp_cmd(esp, ESP_CMD_DMA);
347 zorro_esp_write8(esp, (esp_count >> 0) & 0xff, ESP_TCLOW);
348 zorro_esp_write8(esp, (esp_count >> 8) & 0xff, ESP_TCMED);
350 scsi_esp_cmd(esp, cmd);
355 static void zorro_esp_send_blz2060_dma_cmd(struct esp *esp, u32 addr,
358 struct blz2060_dma_registers __iomem *dregs = esp->dma_regs;
359 u8 phase = esp->sreg & ESP_STAT_PMASK;
361 /* Use PIO if transferring message bytes to esp->command_block_dma */
362 if (phase == ESP_MIP && addr == esp->command_block_dma) {
363 esp_send_pio_cmd(esp, (u32)esp->command_block, esp_count,
368 esp->send_cmd_error = 0;
369 esp->send_cmd_residual = 0;
373 dma_sync_single_for_device(esp->dev, addr, esp_count,
377 dma_sync_single_for_device(esp->dev, addr, esp_count,
391 scsi_esp_cmd(esp, ESP_CMD_DMA);
392 zorro_esp_write8(esp, (esp_count >> 0) & 0xff, ESP_TCLOW);
393 zorro_esp_write8(esp, (esp_count >> 8) & 0xff, ESP_TCMED);
395 scsi_esp_cmd(esp, cmd);
400 static void zorro_esp_send_cyber_dma_cmd(struct esp *esp, u32 addr,
403 struct zorro_esp_priv *zep = dev_get_drvdata(esp->dev);
404 struct cyber_dma_registers __iomem *dregs = esp->dma_regs;
405 u8 phase = esp->sreg & ESP_STAT_PMASK;
408 /* Use PIO if transferring message bytes to esp->command_block_dma */
409 if (phase == ESP_MIP && addr == esp->command_block_dma) {
410 esp_send_pio_cmd(esp, (u32)esp->command_block, esp_count,
415 esp->send_cmd_error = 0;
416 esp->send_cmd_residual = 0;
418 zorro_esp_write8(esp, (esp_count >> 0) & 0xff, ESP_TCLOW);
419 zorro_esp_write8(esp, (esp_count >> 8) & 0xff, ESP_TCMED);
423 dma_sync_single_for_device(esp->dev, addr, esp_count,
428 dma_sync_single_for_device(esp->dev, addr, esp_count,
447 scsi_esp_cmd(esp, cmd);
452 static void zorro_esp_send_cyberII_dma_cmd(struct esp *esp, u32 addr,
455 struct cyberII_dma_registers __iomem *dregs = esp->dma_regs;
456 u8 phase = esp->sreg & ESP_STAT_PMASK;
458 /* Use PIO if transferring message bytes to esp->command_block_dma */
459 if (phase == ESP_MIP && addr == esp->command_block_dma) {
460 esp_send_pio_cmd(esp, (u32)esp->command_block, esp_count,
465 esp->send_cmd_error = 0;
466 esp->send_cmd_residual = 0;
468 zorro_esp_write8(esp, (esp_count >> 0) & 0xff, ESP_TCLOW);
469 zorro_esp_write8(esp, (esp_count >> 8) & 0xff, ESP_TCMED);
473 dma_sync_single_for_device(esp->dev, addr, esp_count,
478 dma_sync_single_for_device(esp->dev, addr, esp_count,
488 scsi_esp_cmd(esp, cmd);
493 static void zorro_esp_send_fastlane_dma_cmd(struct esp *esp, u32 addr,
496 struct zorro_esp_priv *zep = dev_get_drvdata(esp->dev);
497 struct fastlane_dma_registers __iomem *dregs = esp->dma_regs;
498 u8 phase = esp->sreg & ESP_STAT_PMASK;
501 /* Use PIO if transferring message bytes to esp->command_block_dma */
502 if (phase == ESP_MIP && addr == esp->command_block_dma) {
503 esp_send_pio_cmd(esp, (u32)esp->command_block, esp_count,
508 esp->send_cmd_error = 0;
509 esp->send_cmd_residual = 0;
511 zorro_esp_write8(esp, (esp_count >> 0) & 0xff, ESP_TCLOW);
512 zorro_esp_write8(esp, (esp_count >> 8) & 0xff, ESP_TCMED);
516 dma_sync_single_for_device(esp->dev, addr, esp_count,
521 dma_sync_single_for_device(esp->dev, addr, esp_count,
540 scsi_esp_cmd(esp, cmd);
543 static int zorro_esp_dma_error(struct esp *esp)
545 return esp->send_cmd_error;
718 struct esp *esp;
777 host = scsi_host_alloc(tpnt, sizeof(struct esp));
788 esp = shost_priv(host);
789 esp->host = host;
790 esp->dev = &z->dev;
792 esp->scsi_id = host->this_id;
793 esp->scsi_id_mask = (1 << esp->scsi_id);
795 esp->cfreq = 40000000;
797 zep->esp = esp;
799 dev_set_drvdata(esp->dev, zep);
815 esp->ops = zdd->esp_ops;
818 esp->regs = ioremap(ioaddr, 0x20);
821 esp->regs = ZTWO_VADDR(ioaddr);
823 if (!esp->regs) {
828 esp->fifo_reg = esp->regs + ESP_FDATA * 4;
832 zorro_esp_write8(esp, (ESP_CONFIG1_PENABLE | 7), ESP_CFG1);
833 if (zorro_esp_read8(esp, ESP_CFG1) != (ESP_CONFIG1_PENABLE|7)) {
844 esp->dma_regs = ioremap(dmaaddr,
848 esp->dma_regs = ZTWO_VADDR(dmaaddr);
850 if (!esp->dma_regs) {
855 esp->command_block = dma_alloc_coherent(esp->dev, 16,
856 &esp->command_block_dma,
859 if (!esp->command_block) {
866 "Amiga Zorro ESP", esp);
873 err = scsi_esp_register(esp);
883 free_irq(host->irq, esp);
886 dma_free_coherent(esp->dev, 16,
887 esp->command_block,
888 esp->command_block_dma);
892 iounmap(esp->dma_regs);
896 iounmap(esp->regs);
917 struct esp *esp = zep->esp;
918 struct Scsi_Host *host = esp->host;
920 scsi_esp_unregister(esp);
922 free_irq(host->irq, esp);
923 dma_free_coherent(esp->dev, 16,
924 esp->command_block,
925 esp->command_block_dma);
929 iounmap(esp->dma_regs);
933 iounmap(esp->regs);