Lines Matching refs:inb
84 x = inb(qbase + 0xd);
105 if (reqlen >= 128 && (inb(qbase + 8) & 2)) { /* full */
111 if ((j = inb(qbase + 8)) & 4)
117 if (reqlen >= 44 && (inb(qbase + 8) & 8)) { /* 1/3 */
130 while (reqlen && !((j = inb(qbase + 8)) & 0x10))
132 *request++ = inb(qbase + 4);
136 j = inb(qbase + 8);
142 if (reqlen >= 128 && inb(qbase + 8) & 0x10) { /* empty */
148 if (!((j = inb(qbase + 8)) & 8)) {
153 if (reqlen >= 40 && !(inb(qbase + 8) & 4)) { /* 2/3 */
164 while (reqlen && !((j = inb(qbase + 8)) & 2))
170 j = inb(qbase + 8);
174 return inb(qbase + 8) & 0xc0;
190 !((k = inb(qbase + 4)) & 0xe0)) {
224 inb(qbase + 5); /* clear interrupts */
225 if (inb(qbase + 5)) /* if still interrupting */
227 else if (inb(qbase + 7) & 0x1f)
229 while (inb(qbase + 5)); /* clear ints */
233 inb(qbase + 8); /* clear int bits */
274 j = inb(qbase + 6);
275 i = inb(qbase + 5);
279 i |= inb(qbase + 5); /* the 0x10 bit can be set after the 0x08 */
285 j &= 7; /* j = inb( qbase + 7 ) >> 5; */
294 j, i, inb(qbase + 7) & 0x1f);
299 if (inb(qbase + 7) & 0x1f) /* if some bytes in fifo */
304 if (reqlen && !((phase = inb(qbase + 4)) & 6)) { /* data phase */
332 k = inb(qbase + 5); /* should be 0x10, bus service */
342 !(inb(qbase + 4) & 6))
351 while (inb(qbase + 5))
360 i = inb(qbase + 5); /* get chip irq stat */
361 j = inb(qbase + 7) & 0x1f; /* and bytes rec'd */
362 status = inb(qbase + 2);
363 message = inb(qbase + 2);
382 i = inb(qbase + 5); /* should be bus service */
386 i |= inb(qbase + 5);
408 if (!(inb(qbase + 4) & 0x80)) /* false alarm? */
414 while (i-- && inb(qbase + 5)); /* maybe also ql_zap() */
536 return inb(qbase + 0xe) & 0xf8;
556 while (inb(qbase + 0xf) & 4)
570 return (((inb(qbase + 0xe) ^ inb(qbase + 0xe)) == 7) &&
571 ((inb(qbase + 0xe) ^ inb(qbase + 0xe)) == 7));