Lines Matching defs:mem_crb
1371 uint64_t off8, val, mem_crb, word[2] = {0, 0};
1378 mem_crb = QLA82XX_CRB_QDR_NET;
1380 mem_crb = QLA82XX_CRB_DDR_NET;
1398 qla4_82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_LO, temp);
1400 qla4_82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_HI, temp);
1402 qla4_82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);
1404 qla4_82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);
1407 temp = qla4_82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL);
1423 mem_crb + MIU_TEST_AGT_RDDATA(k));
1462 uint64_t off8, mem_crb, tmpw, word[2] = {0, 0};
1468 mem_crb = QLA82XX_CRB_QDR_NET;
1470 mem_crb = QLA82XX_CRB_DDR_NET;
1523 qla4_82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_LO, temp);
1525 qla4_82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_HI, temp);
1527 qla4_82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_LO, temp);
1529 qla4_82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_HI, temp);
1531 qla4_82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_WRDATA_UPPER_LO,
1534 qla4_82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_WRDATA_UPPER_HI,
1538 qla4_82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_CTRL, temp);
1540 qla4_82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_CTRL, temp);
1543 temp = qla4_82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL);