Lines Matching refs:value
60 const uint32_t value)
65 qla8044_wr_reg(ha, qla8044_reg_tbl[crb_reg], value);
120 * qla8044_read_write_crb_reg - Read from raddr and write value to waddr.
131 uint32_t value;
133 qla8044_rd_reg_indirect(vha, raddr, &value);
134 qla8044_wr_reg_indirect(vha, waddr, value);
209 uint32_t addr3, uint32_t mask, uint32_t addr, uint32_t value)
217 qla8044_wr_reg_indirect(vha, addr3, value);
227 * qla8044_rmw_crb_reg - Read value from raddr, AND with test_mask,
228 * Shift Left,Right/OR/XOR with values RMW header and write value to waddr.
240 uint32_t value;
243 value = vha->reset_tmplt.array[p_rmw_hdr->index_a];
245 qla8044_rd_reg_indirect(vha, raddr, &value);
246 value &= p_rmw_hdr->test_mask;
247 value <<= p_rmw_hdr->shl;
248 value >>= p_rmw_hdr->shr;
249 value |= p_rmw_hdr->or_value;
250 value ^= p_rmw_hdr->xor_value;
251 qla8044_wr_reg_indirect(vha, waddr, value);
293 * a. Read the IDC_LOCK_RECOVERY register. If the value in bits 1..0 is
301 * d. Write a value of 2h to the IDC_LOCK_RECOVERY register bits 1..0
392 * value changed), when we were waiting for
440 /* Keep lock counter value, update the ha->func_num to 0xFF */
594 * qla8044_write_list - Write the value (p_entry->arg2) to address specified
621 * write value read to address specified by p_entry->arg2, for all entries in
648 * value read ANDed with test_mask is equal to test_result.
653 * @test_mask : Mask value read with "test_mask"
654 * @test_result : Compare (value&test_mask) with test_result.
662 uint32_t value = 0;
667 ret_val = qla8044_rd_reg_indirect(vha, addr, &value);
677 if ((value & test_mask) != test_result) {
680 ret_val = qla8044_rd_reg_indirect(vha, addr, &value);
696 __func__, value, test_mask, test_result);
704 * register specified by p_entry->arg1 and compare (value AND test_mask) with
719 uint32_t value;
749 p_entry->arg1, &value);
751 p_entry->arg2, &value);
760 * read ar_addr, if (value& test_mask != test_mask) re-read till timeout
806 * qla8044_read_modify_write - Read value from p_entry->arg1, modify the
807 * value, write value to p_entry->arg2. Process entries with p_hdr->delay
877 * if (value & test_mask != test_value) re-read till timeout value expires,
893 uint32_t value;
919 p_entry->dr_addr, &value);
920 vha->reset_tmplt.array[index++] = value;
3004 uint32_t addr1, addr2, value, data, temp, wrVal;
3015 value = rddfe->value;
3027 qla8044_wr_reg_indirect(vha, addr1, (0x40000000 | value));
3048 qla8044_wr_reg_indirect(vha, addr1, value);
3064 ((0x40000000 | value) + stride2));