Lines Matching defs:tmplt_hdr
2213 struct qla8044_minidump_template_hdr *tmplt_hdr;
2218 tmplt_hdr = (struct qla8044_minidump_template_hdr *)
2278 addr = tmplt_hdr->saved_state_array[index];
2285 tmplt_hdr->saved_state_array[index] = read_value;
2292 addr = tmplt_hdr->saved_state_array[index];
2300 tmplt_hdr->saved_state_array[index];
2311 read_value = tmplt_hdr->saved_state_array[index];
2318 tmplt_hdr->saved_state_array[index] = read_value;
2827 struct qla8044_minidump_template_hdr *tmplt_hdr = NULL;
2829 tmplt_hdr = ha->md_tmplt_hdr;
2831 tmplt_hdr->saved_state_array[ISP8044_PEX_DMA_ENGINE_INDEX];
2857 struct qla8044_minidump_template_hdr *tmplt_hdr = NULL;
2859 tmplt_hdr = ha->md_tmplt_hdr;
2861 tmplt_hdr->saved_state_array[ISP8044_PEX_DMA_ENGINE_INDEX];
3229 struct qla8044_minidump_template_hdr *tmplt_hdr;
3279 tmplt_hdr = (struct qla8044_minidump_template_hdr *)
3282 num_entry_hdr = tmplt_hdr->num_of_entries;
3285 "Capture Mask obtained: 0x%x\n", tmplt_hdr->capture_debug_level);
3287 f_capture_mask = tmplt_hdr->capture_debug_level & 0xFF;
3296 tmplt_hdr->driver_capture_mask = ql2xmdcapmask;
3310 tmplt_hdr->driver_timestamp = timestamp;
3313 (((uint8_t *)ha->md_tmplt_hdr) + tmplt_hdr->first_entry_offset);
3314 tmplt_hdr->saved_state_array[QLA8044_SS_OCM_WNDREG_INDEX] =
3315 tmplt_hdr->ocm_window_reg[ha->portnum];