Lines Matching defs:tmplt_hdr
3690 struct qla82xx_md_template_hdr *tmplt_hdr;
3694 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr;
3753 addr = tmplt_hdr->saved_state_array[index];
3759 tmplt_hdr->saved_state_array[index] = read_value;
3766 addr = tmplt_hdr->saved_state_array[index];
3773 tmplt_hdr->saved_state_array[index];
3783 read_value = tmplt_hdr->saved_state_array[index];
3790 tmplt_hdr->saved_state_array[index] = read_value;
4121 struct qla82xx_md_template_hdr *tmplt_hdr;
4126 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr;
4158 no_entry_hdr = tmplt_hdr->num_of_entries;
4163 "Capture Mask obtained: 0x%x\n", tmplt_hdr->capture_debug_level);
4165 f_capture_mask = tmplt_hdr->capture_debug_level & 0xFF;
4174 tmplt_hdr->driver_capture_mask = ql2xmdcapmask;
4176 tmplt_hdr->driver_info[0] = vha->host_no;
4177 tmplt_hdr->driver_info[1] = (QLA_DRIVER_MAJOR_VER << 24) |
4187 if (tmplt_hdr->entry_type != QLA82XX_TLHDR) {
4190 tmplt_hdr->entry_type);
4195 (((uint8_t *)ha->md_tmplt_hdr) + tmplt_hdr->first_entry_offset);
4328 struct qla82xx_md_template_hdr *tmplt_hdr;
4330 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr;
4333 ql2xmdcapmask = tmplt_hdr->capture_debug_level & 0xFF;
4341 ha->md_dump_size += tmplt_hdr->capture_size_array[k];