Lines Matching defs:mem_crb
1293 uint64_t off8, mem_crb, tmpw, word[2] = {0, 0};
1299 mem_crb = QLA82XX_CRB_QDR_NET;
1301 mem_crb = QLA82XX_CRB_DDR_NET;
1353 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_LO, temp);
1355 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_HI, temp);
1357 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_LO, temp);
1359 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_HI, temp);
1361 qla82xx_wr_32(ha, mem_crb +
1364 qla82xx_wr_32(ha, mem_crb +
1368 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);
1370 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);
1373 temp = qla82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL);
1430 uint64_t off8, val, mem_crb, word[2] = {0, 0};
1437 mem_crb = QLA82XX_CRB_QDR_NET;
1439 mem_crb = QLA82XX_CRB_DDR_NET;
1455 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_LO, temp);
1457 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_HI, temp);
1459 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);
1461 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);
1464 temp = qla82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL);
1480 mem_crb + MIU_TEST_AGT_RDDATA(k));