Lines Matching refs:value
72 u32 index, value, offset;
77 value = pm8001_cr32(pm8001_ha, bus_base_number, offset);
78 *destination = cpu_to_le32(value);
260 /* Increment the MEMBASE II Shifting Register value by 0x100.*/
302 /* set dump control value to '1' so that new data will
989 u32 value;
1003 value = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET);
1004 value &= SPCv_MSGU_CFG_TABLE_UPDATE;
1005 } while ((value != 0) && (--max_wait_count));
1010 "Inb doorbell clear not toggled[value:%x]\n",
1011 value);
1047 u32 value;
1056 value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);
1057 } while ((value == 0xFFFFFFFF) && (--max_wait_count));
1063 value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);
1064 } while (((value & SCRATCH_PAD_ILA_READY) !=
1078 value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);
1079 } while (((value & SCRATCH_PAD_RAAE_READY) !=
1093 value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);
1094 } while (((value & SCRATCH_PAD_IOP0_READY) != SCRATCH_PAD_IOP0_READY) &&
1111 value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);
1112 } while (((value & SCRATCH_PAD_IOP1_READY) !=
1129 u32 value;
1134 value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0);
1135 offset = value & 0x03FFFFFF; /* scratch pad 0 TBL address */
1137 pm8001_dbg(pm8001_ha, DEV, "Scratchpad 0 Offset: 0x%x value 0x%x\n",
1138 offset, value);
1139 pcilogic = (value & 0xFC000000) >> 26;
1492 u32 value;
1507 value = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET);
1508 value &= SPCv_MSGU_CFG_TABLE_RESET;
1509 } while ((value != 0) && (--max_wait_count));
1512 pm8001_dbg(pm8001_ha, FAIL, "TIMEOUT:IBDB value/=%x\n", value);
4881 u32 value;
4883 value = pm8001_cr32(pm8001_ha, 0, MSGU_ODR);
4884 if (value)