Lines Matching refs:pm80xx_tbl
520 pm8001_ha->main_cfg_tbl.pm80xx_tbl.signature =
522 pm8001_ha->main_cfg_tbl.pm80xx_tbl.interface_rev =
524 pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev =
526 pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_out_io =
528 pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_sgl =
530 pm8001_ha->main_cfg_tbl.pm80xx_tbl.ctrl_cap_flag =
532 pm8001_ha->main_cfg_tbl.pm80xx_tbl.gst_offset =
534 pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_queue_offset =
536 pm8001_ha->main_cfg_tbl.pm80xx_tbl.outbound_queue_offset =
540 pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_offset0 =
542 pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_length0 =
544 pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_offset1 =
546 pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_length1 =
550 pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping =
554 pm8001_ha->main_cfg_tbl.pm80xx_tbl.analog_setup_table_offset =
557 pm8001_ha->main_cfg_tbl.pm80xx_tbl.int_vec_table_offset =
559 pm8001_ha->main_cfg_tbl.pm80xx_tbl.phy_attr_table_offset =
562 pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer =
565 pm8001_ha->main_cfg_tbl.pm80xx_tbl.ila_version =
567 pm8001_ha->main_cfg_tbl.pm80xx_tbl.inc_fw_version =
572 pm8001_ha->main_cfg_tbl.pm80xx_tbl.signature,
573 pm8001_ha->main_cfg_tbl.pm80xx_tbl.interface_rev,
574 pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev);
578 pm8001_ha->main_cfg_tbl.pm80xx_tbl.gst_offset,
579 pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_queue_offset,
580 pm8001_ha->main_cfg_tbl.pm80xx_tbl.outbound_queue_offset,
581 pm8001_ha->main_cfg_tbl.pm80xx_tbl.int_vec_table_offset,
582 pm8001_ha->main_cfg_tbl.pm80xx_tbl.phy_attr_table_offset);
586 pm8001_ha->main_cfg_tbl.pm80xx_tbl.ila_version,
587 pm8001_ha->main_cfg_tbl.pm80xx_tbl.inc_fw_version);
597 pm8001_ha->gs_tbl.pm80xx_tbl.gst_len_mpistate =
599 pm8001_ha->gs_tbl.pm80xx_tbl.iq_freeze_state0 =
601 pm8001_ha->gs_tbl.pm80xx_tbl.iq_freeze_state1 =
603 pm8001_ha->gs_tbl.pm80xx_tbl.msgu_tcnt =
605 pm8001_ha->gs_tbl.pm80xx_tbl.iop_tcnt =
607 pm8001_ha->gs_tbl.pm80xx_tbl.gpio_input_val =
609 pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[0] =
611 pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[1] =
613 pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[2] =
615 pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[3] =
617 pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[4] =
619 pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[5] =
621 pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[6] =
623 pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[7] =
752 pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_event_log_addr =
754 pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_event_log_addr =
756 pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_size =
758 pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_severity = 0x01;
759 pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_pcs_event_log_addr =
761 pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_pcs_event_log_addr =
763 pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_size =
765 pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_severity = 0x01;
766 pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt = 0x01;
770 pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt |=
773 pm8001_ha->main_cfg_tbl.pm80xx_tbl.crc_core_dump = (0x1 << 16);
849 pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_q_nppd_hppd);
851 pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_event_log_addr);
853 pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_event_log_addr);
855 pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_size);
857 pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_severity);
859 pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_pcs_event_log_addr);
861 pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_pcs_event_log_addr);
863 pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_size);
865 pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_severity);
867 pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt |=
870 pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt);
876 pm8001_ha->main_cfg_tbl.pm80xx_tbl.crc_core_dump);
879 pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping &= 0xCFFFFFFF;
881 pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping |= 0x20000000;
883 pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping);
889 pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer);
891 pm8001_ha->main_cfg_tbl.pm80xx_tbl.interrupt_reassertion_delay);
893 pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer &= 0xffff0000;
894 pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer |=
897 pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer &=
899 pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer |=
903 pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer);
4080 * pm8001_ha->max_q_num - 1 through pm8001_ha->main_cfg_tbl.pm80xx_tbl.